Nirav Dave

Affiliations:
  • Google
  • SRI International, Menlo Park, CA, USA (former)
  • Massachusetts Institute of Technology, Cambridge, MA, USA (former)


According to our database1, Nirav Dave authored at least 24 papers between 2004 and 2023.

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Bibliography

2023
ML-CGRA: An Integrated Compilation Framework to Enable Efficient Machine Learning Acceleration on CGRAs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2016
Fast Protection-Domain Crossing in the CHERI Capability-System Architecture.
IEEE Micro, 2016

2015
CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization.
Proceedings of the 2015 IEEE Symposium on Security and Privacy, 2015

Modular Deductive Verification of Multiprocessor Hardware Designs.
Proceedings of the Computer Aided Verification - 27th International Conference, 2015

Blueswitch: Enabling Provably Consistent Configuration of Network Switches.
Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for networking and communications systems, 2015

2014
Smten with satisfiability-based search.
Proceedings of the 2014 ACM International Conference on Object Oriented Programming Systems Languages & Applications, 2014

2013
Modular compilation of guarded atomic actions.
Proceedings of the 11th ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2013

Enabling Hardware Exploration in Software-Defined Networking: A Flexible, Portable OpenFlow Switch.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

Smten: Automatic Translation of High-Level Symbolic Computations into SMT Queries.
Proceedings of the Computer Aided Verification - 25th International Conference, 2013

2012
Automatic generation of hardware/software interfaces.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2011
A unified model for hardware/software codesign.
PhD thesis, 2011

Verification of microarchitectural refinements in rule-based systems.
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

2010
A design flow based on modular refinement.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

2009
Implementing a fast cartesian-polar matrix interpolator.
Proceedings of the 7th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2009), 2009

2008
802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec.
Proceedings of the Embedded Computer Systems: Architectures, 2008

H.264 Decoder: A Case Study in Multiple Design Points.
Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Getting Formal Verification into Design Flow.
Proceedings of the FM 2008: Formal Methods, 2008

2007
From WiFi to WiMAX: Techniques for High-Level IP Reuse across Different OFDM Protocols.
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

Hardware Acceleration of Matrix Multiplication on a Xilinx FPGA.
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

Scheduling as Rule Composition.
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

2006
802.11a transmitter: a case study in microarchitectural exploration.
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

2005
Automatic synthesis of cache-coherence protocol processors using Bluespec.
Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005

2004
Designing a reorder buffer in Bluespec.
Proceedings of the 2nd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004), 2004

High-level synthesis: an essential ingredient for designing complex ASICs.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004


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