Milad Tanavardi Nasab

Orcid: 0000-0003-3017-4661

According to our database1, Milad Tanavardi Nasab authored at least 7 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
HPAL: High-Performance Adiabatic Logic in the GHz Regime for Energy-Efficient Computing.
Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

2025
Efficient and High Accuracy Approximate Multiplier Design Approach for AI Application.
Circuits Syst. Signal Process., November, 2025

MTJ/CMOS-Based CLB Design for Low-Power and CPA-Resistant Secure Nonvolatile FPGA.
IEEE Trans. Very Large Scale Integr. Syst., May, 2025

Late Breaking Results: Novel Design of MTJ-Based Unified LIF Spiking Neuron and PUF.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
Energy-Efficient Power Analysis Attack Resilient Adiabatic MTJ-Based Nonvolatile CLB.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

A Variation-Aware and Energy-Efficient Spintronic True Random Number Generator.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2023
High-Performance and Robust Spintronic/CNTFET-Based Binarized Neural Network Hardware Accelerator.
IEEE Trans. Emerg. Top. Comput., 2023


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