Mingyan Yu

According to our database, Mingyan Yu authored at least 31 papers between 2002 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Comprehensive probability method of buffer insertion based on Gaussian fitting under process variation condition.

Xinsheng Wang, Yanhong Song, Mingyan Yu

Microelectron. J., April, 2023

2018

The Error Bound of Timing Domain in Model Order Reduction by Krylov Subspace Methods.

Xinsheng Wang, Mingyan Yu

J. Circuits Syst. Comput., 2018

Structure-Preserving-Based Model-Order Reduction of Parameterized Interconnect Systems.

Xinsheng Wang, Mingyan Yu, Chenxu Wang

Circuits Syst. Signal Process., 2018

2017

The Minimum Norm Least-Squares Solution in Reduction by Krylov Subspace Methods.

Xinsheng Wang, Chenxu Wang, Mingyan Yu

J. Circuits Syst. Comput., 2017

2016

Swarm intelligence algorithm for interconnect model order reduction with sub-block structure preserving.

Xinsheng Wang, Chenxu Wang, Mingyan Yu

Int. J. Syst. Sci., 2016

2015

A distinctive O(mn) time algorithm for optimal buffer insertions.

Xinsheng Wang, Wenpan Liu, Mingyan Yu

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2013

A Low Power and variation-Insensitive Current-Mode Signaling Scheme.

Xinsheng Wang, Yizhe Hu, Liang Han, Jinghu Li, Chenxu Wang, Mingyan Yu

J. Circuits Syst. Comput., 2013

An intelligent classification method for Trojan detection based on side-channel analysis.

Chenxu Wang, Jinghu Li, Mingyan Yu, Jinxiang Wang

IEICE Electron. Express, 2013

The Analysis of Generic SIMT Scheduling Model Extracted from GPU.

Yuanxu Xu, Mingyan Yu, Chao Zhang, Bing Yang

Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

Robust current-mode on-chip interconnect signaling scheme in deep submicron.

Xinsheng Wang, Mingyang Hu, Mingyan Yu

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

Novel O-GEHL Based Hyperblock Predictor for EDGE Architectures.

Pengfei Gou, Bing Yang, Mingyan Yu, Zhigang Mao

Proceedings of the Seventh IEEE International Conference on Networking, 2012

A more practical CPA attack against present hardware implementation.

Chenxu Wang, Mingyan Yu, Jinxiang Wang, Peihe Jiang, Xiaochen Tang

Proceedings of the 2nd IEEE International Conference on Cloud Computing and Intelligence Systems, 2012

2011

Power Research of JPEG Circuits in FPGA.

Xinsheng Wang, Mingyan Yu

Proceedings of the Seventh International Conference on Intelligent Information Hiding and Multimedia Signal Processing, 2011

A 16 bit low voltage low power Delta Sigma modulator.

Yongsheng Wang, Yuanhong Li, Mingyan Yu

Proceedings of the International Conference on Electronic and Mechanical Engineering and Information Technology, 2011

2010

MMPI: A flexible and efficient multiprocessor message passing interface for NoC-based MPSoC.

Fangfa Fu, Siyue Sun, Xin'an Hu, Junjie Song, Jinxiang Wang, Mingyan Yu

Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

M5 based EDGE architecture modeling.

Pengfei Gou, Qingbo Li, Yinghan Jin, Qi Zheng, Bing Yang, Mingyan Yu, Jinxiang Wang

Proceedings of the 28th International Conference on Computer Design, 2010

2009

Wideband reconfigurable CMOS Gm-C filter For wireless applications.

Zhiqiang Gao, Jinxiang Wang, Fengchang Lai, Mingyan Yu, Zhongzhao Zhang

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends.

Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye

IEEE Trans. Circuits Syst. II Express Briefs, 2008

2006

A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor.

Tong Zhou, Mingyan Yu, Yizheng Ye

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs.

Zhiyuan Li, Mingyan Yu, Jianguo Ma

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Post linearization of CMOS LNA using double cascade FETs.

Guochi Huang, Tae-Sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A CMOS bandpass filter with wide-tuning range for wireless applications.

Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips.

Qianneng Zhou, Fengchang Lai, Mingyan Yu

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Low-noise high-precision operational amplifier using vertical NPN transistor in CMOS technology.

Zhiyuan Li, Fengchang Lai, Mingyan Yu

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator.

Tong Zhou, Zhibo Zhou, Mingyan Yu, Yizheng Ye

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip.

Qianneng Zhou, Fengchang Lai, Mingyan Yu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier.

Zhiyuan Li, Mingyan Yu, Jianguo Ma

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

A CMOS RF tuning wide-band bandpass filter for wireless applications.

Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Large tuning band range of high frequency filter for wireless applications.

Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003

A Test Architecture for System-on-a-Chip.

Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

2002

Design and implementation of concatenated decoder.

Yuxin You, Jinxiang Wang, Mingyan Yu, Yizheng Ye

Proceedings of the Third International Workshop on Digital and Computational Video, 2002