Mohammad Chahardori

Orcid: 0000-0002-1226-9803

According to our database1, Mohammad Chahardori authored at least 7 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
A New Boosted Active-Capacitor With Negative-G<sub>m</sub> for Wide Tuning Range VCOs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Single-Ended 10T SRAM Cell with High Yield and Low Standby Power.
Circuits Syst. Signal Process., 2021

2018
A Low-Power, Bootstrapped Sample and Hold Circuit with Extended Input Ranged for Analog-to-Digital Converters in CMOS 0.18 μm.
Proceedings of the 15th International Conference on Synthesis, 2018

2013
A 4-Bit, 1.6 GS/s Low Power Flash ADC, Based on Offset Calibration and Segmentation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A low power 1.2 GS/s 4-bit flash ADC in 0.18 µm CMOS.
Proceedings of the East-West Design & Test Symposium, 2013

2011
A sub 1 V high PSRR CMOS bandgap voltage reference.
Microelectron. J., 2011

2008
New low voltage, high PSRR, CMOS bandgap voltage reference.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008


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