Deuk Hyoun Heo

Orcid: 0000-0002-1152-1739

According to our database1, Deuk Hyoun Heo authored at least 66 papers between 2003 and 2024.

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Bibliography

2024
A 14 GHz Integer-N Sub-Sampling PLL With RMS-Jitter of 85.4 fs Occupying an Ultra Low Area of 0.0918 mm<sup>2</sup>.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

7.9 An 8b 6-12GHz 0.18mW/GHz DC Modulated Ramp-Based Phase Interpolator in 65nm CMOS Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
Low-Power Process and Temperature-Invariant Constant Slope-and-Swing Ramp-Based Phase Interpolator.
IEEE J. Solid State Circuits, 2023

Energy-Efficient ReRAM-Based ML Training via Mixed Pruning and Reconfigurable ADC.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

2022
An Inductor-First Single-Inductor Multiple-Output Hybrid DC-DC Converter With Integrated Flying Capacitor for SoC Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021
Fast Beam Training With True-Time-Delay Arrays in Wideband Millimeter-Wave Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A New Boosted Active-Capacitor With Negative-G<sub>m</sub> for Wide Tuning Range VCOs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Fully Integrated Switched-Inductor-Capacitor Voltage Regulator With 0.82-A/mm<sup>2</sup> Peak Current Density and 78% Peak Power Efficiency.
IEEE J. Solid State Circuits, 2021

Wideband Beamforming with Rainbow Beam Training using Reconfigurable True-Time-Delay Arrays for Millimeter-Wave Wireless.
CoRR, 2021

A 4-Element 800MHz-BW 29mW True-Time-Delay Spatial Signal Processor Enabling Fast Beam-Training with Data Communications.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
Clock-Voltage Co-Regulator With Adaptive Power Budget Tracking for Robust Near-Threshold-Voltage Sequential Logic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Analysis and Design Method of Multiple-Output Switched-Capacitor Voltage Regulators With a Reduced Number of Power Electronic Components.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

A Hybrid 3D Interconnect With 2x Bandwidth Density Employing Orthogonal Simultaneous Bidirectional Signaling for 3D NoC.
IEEE Trans. Circuits Syst., 2020

Making a Case for Partially Connected 3D NoC: NFIC versus TSV.
ACM J. Emerg. Technol. Comput. Syst., 2020

Design of Millimeter-Wave Single-Shot Beam Training for True-Time-Delay Array.
Proceedings of the 21st IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2020

Design of Multi-Output Switched-Capacitor Voltage Regulator via Machine Learning.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

A Wide Output Voltage Range Single-Input-Multi-Output Hybrid DC-DC Converter Achieving 87.5% Peak Efficiency With a Fast Response Time and Low Cross Regulation for DVFS Applications.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A Dual-Output Step-Down Switched-Capacitor Voltage Regulator With a Flying Capacitor Crossing Technique for Enhanced Power Efficiency.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Analog-Assisted Digital Capacitorless Low-Dropout Regulator Supporting Wide Load Range.
IEEE Trans. Ind. Electron., 2019

Analysis of Systematic Losses in Hybrid Envelope Tracking Modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 25-35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Fully Integrated Buck Converter with 78% Efficiency at 365mW Output Power Enabled by Switched-Inductor Capacitor Topology and Inductor Current Reduction Technique.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A Sub-1V Analog-Assisted Inverter-Based Digital Low-Dropout Regulator with a Fast Response Time at 25mA/100ps and 99.4% Current Efficiency.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

Hierarchical Design Methodology and Optimization for Proximity Communication based Contactless 3D ThruChip Interface.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2018
High-Performance and Small-Form Factor Near-Field Inductive Coupling for 3-D NoC.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A 16-Gb/s Low-Power Inductorless Wideband Gain-Boosted Baseband Amplifier With Skewed Differential Topology for Wireless Network-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Zero-Power Feed-Forward Spur Cancelation for Supply-Regulated CMOS Ring PLLs.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A Spatial Multi-Bit Sub-1-V Time-Domain Matrix Multiplier Interface for Approximate Computing in 65-nm CMOS.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

A 28GHz 41%-PAE linear CMOS power amplifier using a transformer-based AM-PM distortion-correction technique for 5G phased arrays.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
A Reconfigurable Wireless NoC for Large Scale Microbiome Community Analysis.
IEEE Trans. Computers, 2017

Energy and Area Efficient Near Field Inductive Coupling: A Case Study on 3D NoC.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017

Energy-efficient and robust 3D NoCs with contactless vertical links (Invited paper).
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

2016
CMOS Power Amplifier Integrated Circuit With Dual-Mode Supply Modulator for Mobile Terminals.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A low power sub-harmonic injection locked 2×2 mm-wave beamforming receiver array.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Sub-1-V Bulk-Driven Opamp With an Effective Transconductance-Stabilizing Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

DVFS Pruning for Wireless NoC Architectures.
IEEE Des. Test, 2015

2014
ECPC: Toward Preserving Downtime Data Persistence in Disruptive Wireless Sensor Networks.
ACM Trans. Sens. Networks, 2014

On the Effects of Mismatch on Quadrature Accuracy in Tapped-Capacitor Load Independent Quadrature LC-Oscillators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

CMOS Startup Charge Pump With Body Bias and Backward Control for Energy Harvesting Step-Up Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Design Space Exploration for Wireless NoCs Incorporating Irregular Network Routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Architecture and Design of Multichannel Millimeter-Wave Wireless NoC.
IEEE Des. Test, 2014

Guest Editors' Introduction: Design and Testing of Millimeter-Wave/Subterahertz Circuits and Systems.
IEEE Des. Test, 2014

Introduction to the special session on "Interconnect enhances architecture: Evolution of wireless NoC from planar to 3D".
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

Thermal hotspot reduction in mm-Wave wireless NoC architectures.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Performance evaluation of wireless NoCs in presence of irregular network routing strategies.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Design of an Energy-Efficient CMOS-Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects.
IEEE Trans. Computers, 2013

ECPC: Preserve Downtime Data Persistence in Disruptive Sensor Networks.
Proceedings of the IEEE 10th International Conference on Mobile Ad-Hoc and Sensor Systems, 2013

A 12-40 GHz low phase variation highly linear BiCMOS variable gain amplifier.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Design space exploration for reliable mm-wave wireless NoC architectures.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Performance evaluation and design trade-offs for wireless network-on-chip architectures.
ACM J. Emerg. Technol. Comput. Syst., 2012

A low-power, low phase noise CMOS VCO with suppression of 1/f flicker noise up-conversion.
IEICE Electron. Express, 2012

Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Design of an efficient NoC architecture using millimeter-wave wireless links.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

CMOS compatible many-core noc architectures with multi-channel millimeter-wave wireless links.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

2010
Performance evaluation and receiver front-end design for on-chip millimeter-wave wireless interconnect.
Proceedings of the International Green Computing Conference 2010, 2010

Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2008
A low-phase-noise LC QVCO with bottom-series coupling and capacitor tapping.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
A 5.3GHz low-phase-noise LC VCO with harmonic filtering resistor.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Enhanced gm3 cancellation for linearity improvement in CMOS LNAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A new gain controllable on-chip active balun for 5 GHz direct conversion receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Impact of bias schemes on Doherty power amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003
Direct extraction of an empirical temperature-dependent InGaP/GaAs HBT large-signal model.
IEEE J. Solid State Circuits, 2003

SiGe HBT power amplifier for IS-95 CDMA using a novel process, voltage, and temperature insensitive biasing scheme.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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