Mohammad Javidan

According to our database, Mohammad Javidan authored at least 9 papers between 2008 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

Synchronized Interconnected ADPLLs for Distributed Clock Generation in 65 nm CMOS Technology.

Dimitri Galayko, Chuan Shan, Eldar Zianbetov, Mohammad Javidan, Anton Korniienko, François Anceau, Olivier Billoint, Éric Colinet, Elena Blokhina, Jérôme Juillard

IEEE Trans. Circuits Syst. II Express Briefs, 2019

2013

High-loop-delay sixth-order bandpass continuoustime Sigma-Delta modulators.

Mohammad Javidan, Jérôme Juillard, Philippe Bénabès

IET Circuits Devices Syst., 2013

Distributed clock generator for synchronous SoC using ADPLL network.

Eldar Zianbetov, Dimitri Galayko, François Anceau, Mohammad Javidan, Chuan Shan, Olivier Billoint, Anton Korniienko, Éric Colinet, Gérard Scorletti, J. M. Akrea, Jérôme Juillard

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2011

A Digitally Controlled Oscillator in a 65-nm CMOS process for SoC clock generation.

Eldar Zianbetov, François Anceau, Mohammad Javidan, Dimitri Galayko, Éric Colinet, Jérôme Juillard

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

All-digital PLL array provides reliable distributed clock for SOCs.

Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko, Anton Korniienko, Éric Colinet, Gérard Scorletti, Jean-Michel Akre, Jérôme Juillard

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A novel technique to reduce the metastability of Bang-Bang Phase Frequency Detectors.

Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko, Éric Colinet, Jérôme Juillard

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

FPGA implementation of reconfigurable ADPLL network for distributed clock generation.

Chuan Shan, Eldar Zianbetov, Mohammad Javidan, François Anceau, Mehdi Terosiet, Sylvain Feruglio, Dimitri Galayko, Olivier Romain, Éric Colinet, Jérôme Juillard

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops.

Jean-Michel Akre, Jérôme Juillard, Mohammad Javidan, Eldar Zianbetov, Dimitri Galayko, Anton Korniienko, Éric Colinet

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2008

Band-pass continuous-time delta-sigma modulators employing LWR resonators.

Mohammad Javidan, Philippe Bénabès

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008