Mohammadreza Esmaeilpour
According to our database1,
Mohammadreza Esmaeilpour authored at least 8 papers
between 2024 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2025
A 4.266 Gbps/pin LPDDR4X PHY with an Integrated RISC-V Subsystem Optimized for Large Bump Pitch in 12nm FinFET Technology.
Proceedings of the 38th IEEE International System-on-Chip Conference, 2025
A 15 Gb/s Single-Ended Active-Inductive Equalizer with an Optimized Gain-Enhancing Technique.
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025
Proceedings of the 28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2025
2024
A Wide-Range Low-Power Phase Interpolation-Based Delay Line with a Linearity Improvement Technique.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design - 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024
Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024
Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024