Mondira Deb Pant

According to our database1, Mondira Deb Pant authored at least 4 papers between 1999 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2002
On-chip decoupling capacitor optimization using architectural level prediction.
IEEE Trans. Very Large Scale Integr. Syst., 2002

2000
Inductive Noise Reduction at the Architectural Level.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

1999
An architectural solution for the inductive noise problem due to clock-gating.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

Exploring Microprocessor Architectures for Gigascale Integration.
Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999


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