# Tarek M. Taha

According to our database

Collaborative distances:

^{1}, Tarek M. Taha authored at least 88 papers between 1999 and 2020.Collaborative distances:

## Timeline

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#### On csauthors.net:

## Bibliography

2020

Improved inception-residual convolutional neural network for object recognition.

Neural Computing and Applications, 2020

2019

Hardware Accelerated Semantic Declarative Memory Systems through CUDA and MapReduce.

IEEE Trans. Parallel Distrib. Syst., 2019

Breast Cancer Classification from Histopathological Images with Inception Recurrent Residual Convolutional Neural Network.

J. Digital Imaging, 2019

Skin Cancer Segmentation and Classification with NABLA-N and Inception Recurrent Residual Convolutional Networks.

CoRR, 2019

Advanced Deep Convolutional Neural Network Approaches for Digital Pathology Image Analysis: a comprehensive evaluation with different use cases.

CoRR, 2019

High Speed Cognitive Domain Ontologies for Asset Allocation Using Loihi Spiking Neurons.

Proceedings of the International Joint Conference on Neural Networks, 2019

Design Space Evaluation of a Memristor Crossbar Based Multilayer Perceptron for Image Processing.

Proceedings of the International Joint Conference on Neural Networks, 2019

Memristor Based Autoencoder for Unsupervised Real-Time Network Intrusion and Anomaly Detection.

Proceedings of the International Conference on Neuromorphic Systems, 2019

2018

Flexible memristor based neuromorphic system for implementing multi-layer neural network algorithms.

IJPEDS, 2018

Filament formation in lithium niobate memristors supports neuromorphic programming capability.

Neural Computing and Applications, 2018

Efficient Memristor-Based Architecture for Intrusion Detection and High-Speed Packet Classification.

JETC, 2018

Breast Cancer Classification from Histopathological Images with Inception Recurrent Residual Convolutional Neural Network.

CoRR, 2018

Microscopic Nuclei Classification, Segmentation and Detection with improved Deep Convolutional Neural Network (DCNN) Approaches.

CoRR, 2018

The History Began from AlexNet: A Comprehensive Survey on Deep Learning Approaches.

CoRR, 2018

Recurrent Residual Convolutional Neural Network based on U-Net (R2U-Net) for Medical Image Segmentation.

CoRR, 2018

Handwritten Bangla Character Recognition Using the State-of-the-Art Deep Convolutional Neural Networks.

Comp. Int. and Neurosc., 2018

Analysis and Design of Memristor Crossbar Based Neuromorphic Intrusion Detection Hardware.

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Socrates-D 2.0: A Low Power High Throughput Architecture for Deep Network Training.

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Low Power Memristor Crossbar Based Winner Takes All Circuit.

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Effective Quantization Approaches for Recurrent Neural Networks.

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Deep Versus Wide Convolutional Neural Networks for Object Recognition on Neuromorphic System.

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

2017

A fast single-image super-resolution via directional edge-guided regularized extreme learning regression.

Signal, Image and Video Processing, 2017

State Preserving Extreme Learning Machine: A Monotonically Increasing Learning Approach.

Neural Processing Letters, 2017

On-chip training of memristor crossbar based multi-layer neural networks.

Microelectron. J., 2017

Robust Multi-view Pedestrian Tracking Using Neural Networks.

CoRR, 2017

Handwritten Bangla Digit Recognition Using Deep Learning.

CoRR, 2017

Inception Recurrent Convolutional Neural Network for Object Recognition.

CoRR, 2017

Memristor crossbar based winner take all circuit design for self-organization.

Proceedings of the Neuromorphic Computing Symposium, 2017

Methods for high resolution programming in lithuim niobate memristors for neuromorphic hardware.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Extremely parallel memristor crossbar architecture for convolutional neural network implementation.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Cognitive domain ontologies on the TrueNorth neurosynaptic system.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

On-chip training of memristor based deep neural networks.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Network intrusion detection for cyber security on neuromorphic computing system.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Quadratic Unconstrained Binary Optimization (QUBO) on neuromorphic computing system.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Convolutional sparse coding on neurosynaptic cognitive system.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Object recognition using cellular simultaneous recurrent networks and convolutional neural network.

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Socrates-D: Multicore Architecture for On-Line Learning.

Proceedings of the IEEE International Conference on Rebooting Computing, 2017

Cognitive Domain Ontologies in lookup tables stored in a memristor string matching architecture.

Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

2016

Parallelized mining of domain knowledge on GPGPU and Xeon Phi clusters.

The Journal of Supercomputing, 2016

Off-chip bus power minimization using serialization with cache-based encoding.

Microelectron. J., 2016

A Reconfigurable Low Power High Throughput Streaming Architecture for Big Data Processing.

CoRR, 2016

Neuromemristive Systems: Boosting Efficiency through Brain-Inspired Computing.

IEEE Computer, 2016

Memristor crossbar deep network implementation based on a Convolutional neural network.

Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

High throughput neural network based embedded streaming multicore processors.

Proceedings of the IEEE International Conference on Rebooting Computing, 2016

Non-regularized State Preserving Extreme Learning Machine for Natural Scene Classification.

Proceedings of International Conference on Computer Vision and Image Processing, 2016

2015

Hybrid crossbar architecture for a memristor based cache.

Microelectron. J., 2015

Intrusion Detection Using Deep Belief Network and Extreme Learning Machine.

IJMSTR, 2015

High performance declarative memory systems through MapReduce.

Proceedings of the 16th IEEE/ACIS International Conference on Software Engineering, 2015

Knowledge mining for cognitive agents through path based forward checking.

Proceedings of the 16th IEEE/ACIS International Conference on Software Engineering, 2015

Ex-situ training of dense memristor crossbar for neuromorphic applications.

Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

Memristor based neuromorphic circuit for ex-situ training of multi-layer neural network algorithms.

Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

State Preserving Extreme Learning Machine for face recognition.

Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

2014

Low Power Neuromorphic Architectures to Enable Pervasive Deployment of Intrusion Detection Systems.

Proceedings of the Cybersecurity Systems for Human Cognition Augmentation, 2014

Hardware Accelerated Mining of Domain Knowledge.

Proceedings of the Network Science and Cybersecurity, 2014

On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding.

VLSI Design, 2014

A communication reduction approach to iteratively solve large sparse linear systems on a GPGPU cluster.

Cluster Computing, 2014

Memristor crossbar based multicore neuromorphic processors.

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Memristor Crossbar Based Programmable Interconnects.

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Efficacy of memristive crossbars for neuromorphic processors.

Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

Enabling back propagation training of memristor crossbar neuromorphic processors.

Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

2013

Generalized Memristive Device SPICE Model and its Application in Circuit Design.

IEEE Trans. on CAD of Integrated Circuits and Systems, 2013

Hybrid Crossbar Architecture for a Memristor Based Cache

CoRR, 2013

Hardware Accelerated Cognitively Enhanced Complex Event Processing Architecture.

Proceedings of the 14th ACIS International Conference on Software Engineering, 2013

Memristor SPICE model and crossbar simulation based on devices with nanosecond switching time.

Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

Energy efficient perceptron pattern recognition using segmented memristor crossbar arrays.

Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

Exploring the design space of specialized multicore neural processors.

Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

Routing bandwidth model for feed forward neural networks on multicore neuromorphic architectures.

Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

2011

Multiple memristor read and write circuit for neuromorphic applications.

Proceedings of the 2011 International Joint Conference on Neural Networks, 2011

Analysis of a memristor based 1T1M crossbar architecture.

Proceedings of the 2011 International Joint Conference on Neural Networks, 2011

GPGPU acceleration of Cellular Simultaneous Recurrent Networks adapted for maze traversals.

Proceedings of the 2011 International Joint Conference on Neural Networks, 2011

2010

Acceleration of hierarchical Bayesian network based cortical models on multicore architectures.

Parallel Comput., 2010

Fabrication and testing of memristive devices.

Proceedings of the International Joint Conference on Neural Networks, 2010

Neuromorphic algorithms on clusters of PlayStation 3s.

Proceedings of the International Joint Conference on Neural Networks, 2010

Neuromorphic models on a GPGPU cluster.

Proceedings of the International Joint Conference on Neural Networks, 2010

2009

Scaling analysis of a neocortex inspired cognitive model on the Cray XD1.

The Journal of Supercomputing, 2009

A context switching streaming memory architecture to accelerate a neocortex model.

Microprocess. Microsystems, 2009

FPGA Implementation of Izhikevich Spiking Neural Networks for Character Recognition.

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Parallelizing two classes of neuromorphic models on the Cell multicore architecture.

Proceedings of the International Joint Conference on Neural Networks, 2009

Character recognition with two spiking neural network models on multicore architectures.

Proceedings of the 2009 IEEE Symposium on Computational Intelligence for Multimedia Signal and Vision Processing, 2009

Implementing a hierarchical Bayesian visual cortex model on multi-core processors.

Proceedings of the 47th Annual Southeast Regional Conference, 2009

2008

An Instruction Throughput Model of Superscalar Processors.

IEEE Trans. Computers, 2008

A neocortex model implementation on reconfigurable logic with streaming memory.

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2007

A preliminary investigation of a neocortex model implementation on the Cray XD1.

Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, 2007

2006

PSATSim: an interactive graphical superscalar architecture simulator for power and performance analysis.

Proceedings of the 2006 Workshop on Computer Architecture Education, 2006

2005

Estimating critical region parallelism to guide platform retargeting.

Proceedings of the 43nd Annual Southeast Regional Conference, 2005

2002

Estimating Potential Parallelism for Platform Retargeting.

Proceedings of the 9th Working Conference on Reverse Engineering (WCRE 2002), 28 October, 2002

2000

Heterogeneous architecture models for interconnect-motivated system design.

IEEE Trans. VLSI Syst., 2000

1999

Exploring Microprocessor Architectures for Gigascale Integration.

Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999