Pankaj Pant

According to our database, Pankaj Pant authored at least 15 papers between 1996 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Maximizing Stress Coverage by Novel DFT Techniques and Relaxed Timing Closure.

Arani Sinha, Glenn Colón-Bonet, Michael Fahy, Pankaj Pant, Haijing Mao, Akhilesh Shukla

Proceedings of the IEEE International Test Conference, 2023

2020

Streaming Scan Network (SSN): An Efficient Packetized Data Network for Testing of Complex SoCs.

Jean-François Côté, Mark Kassab, Wojciech Janiszewski, Ricardo Rodrigues, Reinhard Meier, Bartosz Kaczmarek, Peter Orlando, Geir Eide, Janusz Rajski, Glenn Colón-Bonet, Naveen Mysore, Ya Yin, Pankaj Pant

Proceedings of the IEEE International Test Conference, 2020

2016

Lateral coupling faults in multi-ported register files and methods for their testing.

Dilip Bhavsar, Michael Lohmiller, Pankaj Pant

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

2011

Hardware hooks for transition scan characterization.

Pankaj Pant, Eric Skeels

Proceedings of the 2011 IEEE International Test Conference, 2011

2010

Lessons from at-speed scan deployment on an Intel® Itanium® microprocessor.

Pankaj Pant, Joshua Zelman, Glenn Colón-Bonet, Jennifer Flint, Steve Yurash

Proceedings of the 2011 IEEE International Test Conference, 2010

2009

Understanding Power Supply Droop during At-Speed Scan Testing.

Pankaj Pant, Joshua Zelman

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Voltage transient detection and induction for debug and test.

Rex Petersen, Pankaj Pant, Pablo Lopez, Aaron Barton, Jim Ignowski, Doug Josephson

Proceedings of the 2009 IEEE International Test Conference, 2009

2002

On-chip decoupling capacitor optimization using architectural level prediction.

Mondira Deb Pant, Pankaj Pant, D. Scott Wills

IEEE Trans. Very Large Scale Integr. Syst., 2002

2001

Path delay fault diagnosis in combinational circuits with implicitfault enumeration.

Pankaj Pant, Yuan-Chieh Hsu, Sandeep K. Gupta, Abhijit Chatterjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

2000

Inductive Noise Reduction at the Architectural Level.

Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Path-delay fault diagnosis in non-scan sequential circuits with at-speed test application.

Pankaj Pant, Abhijit Chatterjee

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999

An architectural solution for the inductive noise problem due to clock-gating.

Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari

Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

Efficient diagnosis of path delay faults in digital logic circuits.

Pankaj Pant, Abhijit Chatterjee

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1997

Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks.

Pankaj Pant, Vivek De, Abhijit Chatterjee

Proceedings of the 34st Conference on Design Automation, 1997

1996

Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages.

Abhijit Chatterjee, Rathish Jayabharathi, Pankaj Pant, Jacob A. Abraham

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996