Joseph Shor
Orcid: 0000-0002-9184-8642
According to our database1,
Joseph Shor
authored at least 40 papers
between 1999 and 2023.
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Bibliography
2023
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A Resistor-Less nW-Level Bandgap Reference With Fine-Grained Voltage and Temperature Coefficient Trims.
IEEE Open J. Circuits Syst., 2022
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic.
IEEE J. Solid State Circuits, 2022
Mirror<sup>N</sup> PUF: Harvesting Multiple Independent Bits From Each PUF Cell in 65nm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
A 5800 μm² Process Monitor Circuit for Measurement of in-Die Variation of V<sub>th</sub> in 65nm.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Access, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
An Inverter-Based, Ultra-Low Power, Fully Integrated, Switched-Capacitor DC-DC Buck Converter.
Proceedings of the 47th ESSCIRC 2021, 2021
2020
An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability.
IEEE Trans. Circuits Syst., 2020
A Charge Balancing 1450 um<sup>2</sup> PNP-Based Thermal Sensor for Dense Thermal Monitoring.
IEEE Trans. Circuits Syst., 2020
A Miniaturized 0.003 mm<sup>2</sup> PNP-Based Thermal Sensor for Dense CPU Thermal Monitoring.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
A 2 Bit/Cell Tilting SRAM-Based PUF With a BER of 3.1E-10 and an Energy of 21 FJ/Bit in 65nm.
IEEE Open J. Circuits Syst., 2020
IEEE Access, 2020
A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF.
IEEE Access, 2020
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Miniaturized, 0.01 mm<sup>2</sup>, Resistor-Based Thermal Sensor With an Energy Consumption of 0.9 nJ and a Conversion Time of 80 µs for Processor Applications.
IEEE J. Solid State Circuits, 2018
Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2018
Ultra-Miniature 0.003 mm<sup>2</sup> PNP-Based Thermal Sensor for CPU Thermal Monitoring.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
2017
Ultra miniature offset cancelled bandgap reference with ±0.534% inaccuracy from -10°C to 110°C.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process.
IEEE J. Solid State Circuits, 2016
Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm.
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
Compact BJT-Based Thermal Sensor for Processor Applications in a 14 nm tri-Gate CMOS Process.
IEEE J. Solid State Circuits, 2015
8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2013
Miniaturized BJT-Based Thermal Sensor for Microprocessors in 32- and 22-nm Technologies.
IEEE J. Solid State Circuits, 2013
2012
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor.
IEEE J. Solid State Circuits, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
Low noise linear voltage regulator for use as an on-chip PLL supply in microprocessors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Miniaturized CMOS thermal sensor array for temperature gradient measurement in microprocessors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
1999
Circuit methods for the integration of low voltage (1.1-1.8V) analog functions on system-on-a-chip IC's in a single-poly CMOS processes.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
Novel method to compensate for resistor non-linearities and its application to the integration of analog functions on system-on-a-chip ICs.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999