Muzaffar Rao

Orcid: 0000-0003-3271-043X

According to our database1, Muzaffar Rao authored at least 15 papers between 2014 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Geometric Insight into the Control Allocation Problem for Open-Frame ROVs and Visualisation of Solution.
Robotics, 2020

2019
Real-Time Secure/Unsecure Video Latency Measurement/Analysis with FPGA-Based Bump-in-the-Wire Security.
Sensors, 2019

2018
Real-Time Video Latency Measurement between a Robot and Its Remote Control Station: Causes and Mitigation.
Wirel. Commun. Mob. Comput., 2018

Bump in the wire (BITW) security solution for a marine ROV remote control application.
J. Inf. Secur. Appl., 2018

An efficient implementation of FPGA based high speed IPSec (AH/ESP) core.
Int. J. Internet Protoc. Technol., 2018

An Efficient High Speed AES Implementation Using Traditional FPGA and LabVIEW FPGA Platforms.
Proceedings of the International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2018

2017
Cluster head election and rotation for medical-based wireless sensor networks.
Proceedings of the 4th International Conference on Control, 2017

2016
Defence against Black Hole and Selective Forwarding Attacks for Medical WSNs in the IoT.
Sensors, 2016

An FPGA-based reconfigurable IPSec AH core with efficient implementation of SHA-3 for high speed IoT applications.
Secur. Commun. Networks, 2016

High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs.
J. Circuits Syst. Comput., 2016

2015
Healthcare WSN: Cluster Elections and Selective Forwarding Defense.
Proceedings of the 9th International Conference on Next Generation Mobile Applications, 2015

AES implementation on Xilinx FPGAs suitable for FPGA based WBSNs.
Proceedings of the 9th International Conference on Sensing Technology, 2015

FPGA Based Reconfigurable IPSec AH Core Suitable for IoT Applications.
Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

FPGA Based Real Time 'Secure' Body Temperature Monitoring Suitable for WBSN.
Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

2014
Efficient High Speed Implementation of Secure Hash Algorithm-3 on Virtex-5 FPGA.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014


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