Ian Andrew Grout

Orcid: 0000-0003-1462-0481

According to our database1, Ian Andrew Grout authored at least 37 papers between 1995 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Realizing Mathematics of Arrays Operations as Custom Architecture Hardware-Software Co-Design Solutions.
Inf., 2022

2021
A Standard-Based Internet of Things Platform and Data Flow Modeling for Smart Environmental Monitoring.
Sensors, 2021

Towards a Universally Accessible Laboratory for the Teaching and Learning of Electronic and Computer Engineering.
Proceedings of the Online Engineering and Society 4.0, 2021

2020
Synthesis and Optimization of Majority Expressions through a Mathematical Model.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

A comparative analysis of LFSR cascading for hardware efficiency and high fault coverage in BIST applications.
Proceedings of the 29th IEEE Asian Test Symposium, 2020

2019
Multiple Controlled Antirandom Testing (MCAT) for High Fault Coverage in a Black Box Environment.
IEEE Access, 2019

FPGA hardware linear regression implementation using fixed-point arithmetic.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

2018
Horizontal diversity in test generation for high fault coverage.
Turkish J. Electr. Eng. Comput. Sci., 2018

Human-Computer Interaction in Remote Laboratories with the Leap Motion Controller.
Proceedings of the Smart Industry & Smart Education, 2018

Evaluation of compensation techniques for CMOS operational amplifier design.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018

2017
Pole-zero estimation and analysis of op-amp design with negative Miller compensation.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

2016
An FPGA-based reconfigurable IPSec AH core with efficient implementation of SHA-3 for high speed IoT applications.
Secur. Commun. Networks, 2016

High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs.
J. Circuits Syst. Comput., 2016

2015
Widening participation in EIE programmes across Europe for students with disabilities.
Proceedings of the 2015 International Conference on Information Technology Based Higher Education and Training, 2015

Marketing EIE programmes in higher education towards students from underrepresented groups.
Proceedings of the 2015 International Conference on Information Technology Based Higher Education and Training, 2015

AES implementation on Xilinx FPGAs suitable for FPGA based WBSNs.
Proceedings of the 9th International Conference on Sensing Technology, 2015

FPGA Based Reconfigurable IPSec AH Core Suitable for IoT Applications.
Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

FPGA Based Real Time 'Secure' Body Temperature Monitoring Suitable for WBSN.
Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

2014
Legislation and policies for disabled students in European Countries.
Proceedings of the 2014 Information Technology Based Higher Education and Training, 2014

RFID in electronic engineering education.
Proceedings of the 2014 IEEE Global Engineering Education Conference, 2014

Efficient High Speed Implementation of Secure Hash Algorithm-3 on Virtex-5 FPGA.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
A Reconfigurable Low-Noise Amplifier Using a Tunable Active Inductor for Multistandard Receivers.
Circuits Syst. Signal Process., 2013

2012
The Development of an Online Support Tool for the Teaching and Learning of the IEEE Standard 1500 for Embedded Core-based Integrated Circuits.
Int. J. Online Eng., 2012

Internet based support tool for the teaching and learning of the IEEE standard 1500 for embedded core-based integrated circuits.
Proceedings of the IEEE Global Engineering Education Conference, 2012

2009
Remote Laboratory Description Language Based On XML.
Int. J. Online Eng., 2009

2008
Undergraduate/postgraduate student project work to support the teaching and learning of remote laboratory design.
Int. J. Online Eng., 2008

2007
Memory Based Analogue Signal Generation Implementation Issues for BIST.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006
A Joint Master Program in Remote Engineering.
Int. J. Online Eng., 2006

Evolution of a Remote Access Facility for a PLL Measurement Course.
Proceedings of the Second International Conference on e-Science and Grid Technologies (e-Science 2006), 2006

2005
Development of a Remote Access Facility for a PLL Test Course.
Int. J. Online Eng., 2005

Local and Remote Laboratory User Experimentation Access using Digital Programmable Logic.
Int. J. Online Eng., 2005

2004
A Matlab Based On-Chip Signal Generation and Analysis Environment for Mixed Signal Circuits.
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

2003
PLL based ASIC system for DSP real-time analogue interface.
Microprocess. Microsystems, 2003

1998
An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits.
Proceedings of the 1998 Design, 1998

1997
A new quality estimation methodology for mixed-signal and analogue ICs.
Proceedings of the European Design and Test Conference, 1997

1996
Defect-Oriented vs. Schematic-Level Based Fault Simulation for Mixed-Signal ICs.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995
Design and testing of a PI controller ASIC.
Microprocess. Microsystems, 1995


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