Naeem Maroof

Orcid: 0000-0001-9654-8123

According to our database1, Naeem Maroof authored at least 11 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Bibliography

2023
Reversible encryption and lossless data hiding for medical imaging aiding smart health care.
Clust. Comput., October, 2023

2022
A Double Bit Approximate Adder Providing a New Design Perspective for Gate-Level Design.
J. Circuits Syst. Comput., 2022

Evolution of random access process: From Legacy networks to 5G and beyond.
Trans. Emerg. Telecommun. Technol., 2022

An Area-Efficient Majority Logic-Based Approximate Adders with Low Delay for Error-Resilient Applications.
Circuits Syst. Signal Process., 2022

2019
A Novel Dissimilarity of Activity Biomarker and Functional Connectivity Analysis for the Epilepsy Diagnosis.
Symmetry, 2019

Architectural design tradeoffs in SRAM-based TCAMs.
IEICE Electron. Express, 2019

2018
Charge sharing write driver and half- V DD pre-charge 8T SRAM with virtual ground for low-power write and read operation.
IET Circuits Devices Syst., 2018

2017
10T SRAM Using Half-V<sub>DD</sub> Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Charge-sharing read port with bitline pre-charging and sensing scheme for low-power SRAMs.
Int. J. Circuit Theory Appl., 2017

2016
Charge sharing based 10T SRAM for low-power.
IEICE Electron. Express, 2016

2015
Energy efficient low static-power voltage level shifter.
IEICE Electron. Express, 2015


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