Bai-Sun Kong

Orcid: 0000-0002-1077-7038

According to our database1, Bai-Sun Kong authored at least 66 papers between 1996 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
CMOS Clock-Gated Synchronous Up/Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-Flop.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

Low-Power High-Speed Sense-Amplifier-Based Flip-Flops With Conditional Bridging.
IEEE Access, 2023

DCVS Level Shifter for Clock Path.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Adding Distance Information to Self-Supervised Learning for rich Representations.
Proceedings of the IEEE International Conference on Image Processing, 2023

A Compact Low-Power Time-Domain Winner-Take-All Circuit.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Energy- and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021
How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Dynamic Differential Flip-Flop without Explicit Output Latching Stage for High-Speed SoC.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

2019
A Fast Response PWM Buck Converter With Active Ramp Tracking Control in a Load Transient Period.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

2018
Charge sharing write driver and half- V DD pre-charge 8T SRAM with virtual ground for low-power write and read operation.
IET Circuits Devices Syst., 2018

Pair-wise staggering transmitter for single-ended parallel signaling.
IEICE Electron. Express, 2018

2017
Conditional-Boosting Flip-Flop for Near-Threshold Voltage Application.
IEEE Trans. Very Large Scale Integr. Syst., 2017

10T SRAM Using Half-V<sub>DD</sub> Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface.
IEEE J. Solid State Circuits, 2017

2016
Crosstalk cancellation for frame memory bus on TV main boards.
Proceedings of the IEEE 6th International Conference on Consumer Electronics - Berlin, 2016

2015
Bootstrapped ring oscillator with feedforward inputs for ultra-low-voltage application.
IEICE Electron. Express, 2015

10.4 A 5.8Gb/s adaptive integrating duobinary-based DFE receiver for multi-drop memory interface.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
CMOS Charge Pump With No Reversion Loss and Enhanced Drivability.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A low-noise and low-power voltage-controlled oscillator.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A fast response integrated current-sensing circuit for peak-current-mode buck regulator.
Proceedings of the ESSCIRC 2014, 2014

2013
Accurate quadruple-gamma-curve correction for line inversion-based mobile TFT-LCD driver ICS.
IEEE Trans. Consumer Electron., 2013

A DFE Receiver With Equalized VREF for Multidrop Single-Ended Signaling.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Blind-oversampling adaptive oversample-level DFE receiver for unsynchronized global on-chip serial links.
IEICE Electron. Express, 2013

2012
Low-Voltage CMOS Differential Logic Style With Supply Voltage Approaching Device Threshold.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

High-Speed Low-Power Boosted Level Converters for Dual Supply Systems.
IEICE Trans. Electron., 2012

Low-power dual-supply clock networks with clock gating and frequency doubling.
IEICE Electron. Express, 2012

Enhanced bootstrapped CMOS driver for large RC-load and ultra-low voltage VLSI.
IEICE Electron. Express, 2012

An efficient dual-supply design for low-power mobile systems.
Proceedings of the International SoC Design Conference, 2012

Adaptive frequency-controlled ultra-fast hysteretic buck converter for portable devices.
Proceedings of the International SoC Design Conference, 2012

2011
Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM.
IEEE J. Solid State Circuits, 2011

A Novel Body Bias Selection Scheme for Leakage Minimization.
IEICE Trans. Electron., 2011

A bandgap reference with resistance variation compensated.
IEICE Electron. Express, 2011

Novel Low-Voltage Small-Area I/O Buffer for Mixed-Voltage Application.
Proceedings of the Control and Automation, and Energy System Engineering, 2011

Line inversion-based mobile TFT-LCD driver IC with accurate quadruple-gamma-curve correction.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

CMOS charge pump with separated charge sharing for improved boosting ratio and relaxed timing restriction.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
A line inversion-based stepwise data driving for low-power mobile TFT-LCDs.
IEEE Trans. Consumer Electron., 2010

Low-Power High-Speed Data Serializer for Mobile TFT-LCD Driver ICs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

New Low-Voltage Low-Latency Mixed-Voltage I/O Buffer.
IEICE Trans. Electron., 2010

A temperature-stabilized voltage reference utilizing MOS body effect.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

High-speed low-power bootstrapped level converter for dual supply systems.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
Low-Power CMOS Synchronous Counter With Clock Gating Embedded Into Carry Propagation.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

CMOS cross-coupled charge pump with improved latch-up immunity.
IEICE Electron. Express, 2009

New low-voltage small-area mixed-voltage I/O buffer.
IEICE Electron. Express, 2009

45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
CMOS Differential Logic Family With Conditional Operation for Low-Power Application.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Low-Voltage Bootstrapped CMOS Drivers With Efficient Conditional Bootstrapping.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Self-Resetting Level-Conversion Flip-Flops with Direct Output Feedback for Dual-Supply SoCs.
IEICE Trans. Electron., 2008

Novel area-efficient regenerator for driving long on-chip interconnects.
IEICE Electron. Express, 2008

Novel bootstrapped CMOS differential logic family for ultra-low voltage SoCs.
IEICE Electron. Express, 2008

Wafer-Level Characterization of Probecards using NAC Probing.
Proceedings of the 2008 IEEE International Test Conference, 2008

PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Presetting pulse-based flip-flop.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Slew-Rate-Controlled Output Driver Having Constant Transition Time Over Process, Voltage, Temperature, and Output Load Variations.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control.
Microelectron. J., 2007

CMOS Level Converter with Balanced Rise and Fall Delays.
IEICE Trans. Electron., 2007

Novel explicit pulse-based flip-flop for high speed and low power SoCs.
IEICE Electron. Express, 2007

Nonoverlapping Cuspid-Pulsed Flip-Flop.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2005
A slew rate-controlled output driver having a constant transition time over the variations of process, voltage and temperature.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

A high current driving charge pump with current regulation method.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003
Variable sampling window flip-flop for low-power application.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2001
Conditional-capture flip-flop for statistical power reduction.
IEEE J. Solid State Circuits, 2001

2000
Data-dependent evaluating latched CMOS differential logic family for statistical power reduction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1996
Charge recycling differential logic (CRDL) for low power application.
IEEE J. Solid State Circuits, 1996


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