Hyunchul Shin

Orcid: 0000-0003-3020-5130

According to our database1, Hyunchul Shin authored at least 59 papers between 1986 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Infrared and visible image fusion using a feature attention guided perceptual generative adversarial network.
J. Ambient Intell. Humaniz. Comput., July, 2023

2022
Al Engine Structures in LG TV Processor.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
Two-stream small-scale pedestrian detection network with feature aggregation for drone-view videos.
Multidimens. Syst. Signal Process., 2021

2020
Performance enhancement techniques for traffic sign recognition using a deep neural network.
Multim. Tools Appl., 2020

2019
Effective datapath logic extraction techniques using connection vectors.
IET Circuits Devices Syst., 2019

A New Deep Learning Based Multi-Spectral Image Fusion Method.
Entropy, 2019

Context-aware pedestrian detection especially for small-sized instances with Deconvolution Integrated Faster RCNN (DIF R-CNN).
Appl. Intell., 2019

2018
New Dark Area Sensitive Tone Mapping for Deep Learning Based Traffic Sign Recognition.
Sensors, 2018

Efficient coarser-to-fine holistic traffic sign detection for occlusion handling.
IET Image Process., 2018

Multi-layer fusion techniques using a CNN for multispectral pedestrian detection.
IET Comput. Vis., 2018

Korean Traffic Sign Detection Using Deep Learning.
Proceedings of the International SoC Design Conference, 2018

Infrared and Visible Image Fusion using Multi-Scale Decomposition and Visual Saliency Map.
Proceedings of the International SoC Design Conference, 2018

Weather Classification using Convolutional Neural Networks.
Proceedings of the International SoC Design Conference, 2018

2017
Charge-sharing read port with bitline pre-charging and sensing scheme for low-power SRAMs.
Int. J. Circuit Theory Appl., 2017

Robust hypothesis generation method using binary blob analysis for multi-lane detection.
IET Image Process., 2017

D-patches: effective traffic sign detection with occlusion handling.
IET Comput. Vis., 2017

Effective regularity extraction and placement techniques for datapath-intensive circuits.
IET Circuits Devices Syst., 2017

Hand gesture recognition using deep learning.
Proceedings of the International SoC Design Conference, 2017

2016
Single image dehazing via reliability guided fusion.
J. Vis. Commun. Image Represent., 2016

Vanishing point detection using random forest and patch-wise weighted soft voting.
IET Image Process., 2016

Single image dehazing with bright object handling.
IET Comput. Vis., 2016

Road vanishing point detection using weber adaptive local filter and salient-block-wise weighted soft voting.
IET Comput. Vis., 2016

Charge sharing based 10T SRAM for low-power.
IEICE Electron. Express, 2016

Advanced Road Vanishing Point Detection by Using Weber Adaptive Local Filter.
Proceedings of the Internet of Vehicles - Technologies and Services, 2016

2015
Real-time single image dehazing using block-to-pixel interpolation and adaptive dark channel prior.
IET Image Process., 2015

Detecting partially occluded vehicles with geometric and likelihood reasoning.
IET Comput. Vis., 2015

Energy efficient low static-power voltage level shifter.
IEICE Electron. Express, 2015

2014
Control signal aware slice-level window based legalization method for FPGA placement (abstract only).
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

Enhancement of hough voting by using appearance similarity for object detection.
Proceedings of the International Conference on Computer, 2014

Discriminative leaf based Hough Forest for vehicle detection.
Proceedings of the International Conference on Computer, 2014

2013
An effective window based legalization algorithm for FPGA placement.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

2012
Pedestrian detection and tracking using deformable part models and Kalman filtering.
Proceedings of the International SoC Design Conference, 2012

Image processing and vision techniques for smart vehicles.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Game theory-based resource allocation strategy for clustering based wireless sensor network.
Proceedings of the 6th International Conference on Ubiquitous Information Management and Communication, 2012

An Efficient Pedestrian Detection Method by Using Coarse-to-Fine Detection and Color Histogram Similarity.
Proceedings of the Convergence and Hybrid Information Technology, 2012

Integrated Circuit Floorplanning by Using an Analytical Algorithm.
Proceedings of the Convergence and Hybrid Information Technology, 2012

2011
New Single Camera Vehicle Detection Based on Gabor Features for Real Time Operation.
Proceedings of the Convergence and Hybrid Information Technology, 2011

2010
Low-cost design for repair with circuit partitioning.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2007
Operation Mode Based High-Level Switching Activity Analysis for Power Estimation of Digital Circuits.
IEICE Trans. Commun., 2007

Efficient Motion Estimation for H.264 Codec by Using Effective Scan Ordering.
IEICE Trans. Commun., 2007

2006
A cost-effective VLSI architecture for anisotropic texture filtering in limited memory bandwidth.
IEEE Trans. Very Large Scale Integr. Syst., 2006

2003
A hardware-like high-level language based environment for 3D graphics architecture exploration.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2001
A hardware cost minimized fast Phong shader.
IEEE Trans. Very Large Scale Integr. Syst., 2001

SPAF: Sub-texel Precision Anisotropic Filtering.
Proceedings of the 2001 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, 2001

1999
Hierarchy Restructuring for Hierarchical LVS Comparison.
VLSI Design, 1999

1998
A minimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

Hierarchical LVS Based on Hierarchy Rebuilding.
Proceedings of the ASP-DAC '98, 1998

1996
A performance-driven logic emulation system: FPGA network design and performance-driven partitioning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

1995
Performance-oriented technology mapping for LUT-based FPGA's.
IEEE Trans. Very Large Scale Integr. Syst., 1995

Performance-driven circuit partitioning for prototyping by using multiple FPGA chips.
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1993
A simple yet effective technique for partitioning.
IEEE Trans. Very Large Scale Integr. Syst., 1993

A combined hierarchical placement algorithm.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992
A New Hierarchical Layout Compactor Using Simplified Graph Models.
Proceedings of the 29th Design Automation Conference, 1992

1990
'Zone-refining' techniques for IC layout compaction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

1989
A cost function based optimization technique for scheduling in data path synthesis.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

A Technology-adaptive Allocation of Functional Units and Connections.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

An Efficient Two-Dimensional Layout Compaction Algorithm.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1987
A Detailed Router Based on Incremental Routing Modifications: Mighty.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

1986
Two-dimensional compaction by "zone refining".
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986


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