Nivedita Shrivastava

According to our database, Nivedita Shrivastava authored at least 11 papers between 2020 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

A Theoretical Framework For Modeling Cache-based Side-Channel Attacks and Countermeasures.

Nivedita Shrivastava, Smruti R. Sarangi

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

2024

SecScale: A Scalable and Secure Trusted Execution Environment for Servers.

Ani Sunny, Nivedita Shrivastava, Smruti R. Sarangi

CoRR, 2024

NeuroPlug: Plugging Side-Channel Leaks in NPUs using Space Filling Curves.

Nivedita Shrivastava, Smruti R. Sarangi

CoRR, 2024

2023

Toward an Optimal Countermeasure for Cache Side-Channel Attacks.

Nivedita Shrivastava, Smruti R. Sarangi

IEEE Embed. Syst. Lett., September, 2023

SparseLock: Securing Neural Network Models in Deep Learning Accelerators.

Nivedita Shrivastava, Smruti R. Sarangi

CoRR, 2023

SecOComp: A Fast and Secure Simultaneous Compression and Encryption Scheme.

Nivedita Shrivastava, Smruti R. Sarangi

CoRR, 2023

Securator: A Fast and Secure Neural Processing Unit.

Nivedita Shrivastava, Smruti Ranjan Sarangi

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022

Seculator: A Fast and Secure Neural Processing Unit.

Nivedita Shrivastava, Smruti R. Sarangi

CoRR, 2022

PredStereo: An Accurate Real-time Stereo Vision System.

Diksha Moolchandani, Nivedita Shrivastava, Anshul Kumar, Smruti R. Sarangi

Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2022

2021

A survey of hardware architectures for generative adversarial networks.

Nivedita Shrivastava, Muhammad Abdullah Hanif, Sparsh Mittal, Smruti Ranjan Sarangi, Muhammad Shafique

J. Syst. Archit., 2021

2020

Efficient hardware implementations of QTL cipher for RFID applications.

Nivedita Shrivastava, Pulkit Singh, Bibhudendra Acharya

Int. J. High Perform. Syst. Archit., 2020