Nobuhiko Nakano

According to our database, Nobuhiko Nakano authored at least 13 papers between 2015 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

A Continuous-Time Pulse Compressor with Linear Frequency-Dependent Delay Achieving 1.66-<i>μ</i>s Maximum Delay and Received Echo Enhancement by 6.7-dB for Ultrasound Imaging.

Shinya Kajiyama, Mizuki Mori, Yuki Koroyasu, Tomonari Nagata, Takahisa Mitsui, Nobuhiko Nakano, Hiroki Ishikuro

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2026

2023

Germanium- and Silicon-Nanotransistor Designs by Electrical and Thermal Self-Consistent Analysis.

Takaya Sugiura, Shiun Yamakiri, Nobuhiko Nakano

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023

High-Temperature Operational Piezoresistive Pressure Sensor on Standard CMOS Process.

Takaya Sugiura, Hiroki Miura, Nobuhiko Nakano

IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

2021

Speech Signal Processing Using Consonant-Vowel Location Detection.

Shusuke Nakazato, Nobuhiko Nakano

Proceedings of the Ninth International Symposium on Computing and Networking, 2021

2020

An On-Chip Scalable Low Power Consumption High-Voltage Driver Based on Standard CMOS Technology.

Jorge Cañada, Yui Yoshida, Hiroki Miura, Nobuhiko Nakano

Proceedings of the International SoC Design Conference, 2020

A Low-Power Multi-Frequency Chopper-Stabilized Readout with Time-Domain Delta-Sigma Modulator Suitable for Neural Recording.

Mikiyoshi Mikawa, Kenta Yagi, Kazuki Itakura, Leo Onuki, Nobuhiko Nakano

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

An On-Chip Self-Powered Non-Volatile One-Time-Programmable Memory System in Standard CMOS Technology.

Jorge Cañada, Yui Yoshida, Hiroki Miura, Nobuhiko Nakano

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019

A Delta-Sigma Modulator With Frequency Division Multiplexing for Multi-Channel EEG Acquisition Front-end.

Mikiyoshi Mikawa, Shohei Kawazoe, Ryuto Fukuoka, Nobuhiko Nakano

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018

A Low Noise Analog Front-end Design with an N-path Filter for Dry EEG Recording.

Takumi Deguchi, Ryoya Tanaka, Shohei Kawazoe, Ryuto Fukuoka, Nobuhiko Nakano

Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018

2016

Compensation Technique for Current-to-Voltage Converters for LSI Patch Clamp System Using High Resistive Feedback.

Hiroki Yotsuda, Retdian Agung Nicodimus, Masahiro Kubo, Taro Kosaka, Nobuhiko Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

Area-efficient cross-coupled charge pump for on-chip solar cell.

Yoshimasa Minami, Kazuma Igarashi, Takaya Sugiura, Nobuhiko Nakano

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2016

Valiable frequency characteristics multi-channel on-chip patch-clamp system using 0.18 um CMOS technology.

Masahiro Kubo, Taro Kosaka, Takanori Miyawaki, Kota Ito, Nobuhiko Nakano

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2016

2015

A design of Transimpedance Amplifier using OTA as a feedback resistor for patch-clamp measurement system.

Masahiro Kubo, Hiroki Yotsuda, Taro Kosaka, Nobuhiko Nakano

Proceedings of the 2015 International Symposium on Intelligent Signal Processing and Communication Systems, 2015