Shinya Kajiyama

Orcid: 0000-0003-2237-5164

According to our database1, Shinya Kajiyama authored at least 9 papers between 2007 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
T/R Switch Composed of Three HV-MOSFETs With 12.1-μW Consumption That Enables Per-Channel Self-Loopback AC Tests and -18.1-dB Switching Noise Suppression for 3-D Ultrasound Imaging With 3072-Ch Transceiver.
IEEE Trans. Very Large Scale Integr. Syst., 2022

2021
A Low-Power Current-Reuse LNA for 3D Ultrasound Beamformers.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021

2019
Single-Chip 3072-Element-Channel Transceiver/128-Subarray-Channel 2-D Array IC With Analog RX and All-Digital TX Beamformer for Echocardiography.
IEEE J. Solid State Circuits, 2019

T/R-Switch Composed of 3 High-Voltage MOSFETs with 12.1 µW Consumption that can Perform Per-channel TX to RX Self-Loopback AC Tests for 3D Ultrasound Imaging with 3072-channel Transceiver.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2017
27.6 Single-chip 3072ch 2D array IC with RX analog and all-digital TX beamformer for 3D ultrasound imaging.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
A concentrated springs architecture for single-digit frequency symmetry in Si MEMS gyroscope.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

2009
A 300 MHz Embedded Flash Memory with Pipeline Architecture and Offset-Free Sense Amplifiers for Dual-Core Automotive Microcontrollers.
IEICE Trans. Electron., 2009

2008
A Design of Constant-Charge-Injection Programming Scheme for AG-AND Flash Memories Using Array-Level Analytical Model.
IEICE Trans. Electron., 2008

2007
Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node.
IEEE J. Solid State Circuits, 2007


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