Nuno Paulino

Orcid: 0000-0001-8053-902X

Affiliations:
  • Universidade NOVA de Lisboa, Caparica, Portugal


According to our database1, Nuno Paulino authored at least 74 papers between 1993 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
A Calibration Scheme for a Sigma-Delta Modulator Using Passive Integrators.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

2021
Transistor-level optimization methodology for the complete design of switched-capacitor filter circuits.
Int. J. Circuit Theory Appl., 2021

2020
Analysis of capacitance spread reduction techniques for 50-Hz switched-capacitor notch filters.
Int. J. Circuit Theory Appl., 2020

A Simple Analysis to Determine the Limits of a CMOS Technology to Implement SC DC-DC Converters.
Proceedings of the Technological Innovation for Life Improvement, 2020

2019
A 0.9-V Analog-to-Digital Acquisition Channel for an IoT Water Management Sensor Node.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Combined Organic Photovoltaic Cells and Ultra Low Power CMOS Circuit for Indoor Light Energy Harvesting.
Sensors, 2019

2018
A 0.9-V Programmable Second-Order Bandpass Switched-Capacitor Filter for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Continuous-Time Delta-Sigma Modulators Based on Passive RC Integrators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 130 nm CMOS Power Management Unit With a Multi-Ratio Core SC DC-DC Converter for a Supercapacitor Power Supply.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Live Demonstration: An Automated Test Bench for an 130nm SC DC-DC Converter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Experimental Set-up for an IoT Power Supply with an 130 nm SC DC-DC Converter.
Proceedings of the Technological Innovation for Resilient Systems, 2018

2017
Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System.
IEEE Trans. Educ., 2017

A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A Third-Order MASH $\Sigma \Delta $ Modulator Using Passive Integrators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A 50 Hz SC notch filter for IoT applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 3rd order MASH switched-capacitor ΣΔM using ultra incomplete settling employing an area reduction technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Design Methodology for an All CMOS Bandgap Voltage Reference Circuit.
Proceedings of the Technological Innovation for Smart Systems, 2017

2016
Analysis and implementation of a power management unit with a multiratio switched capacitor DC-DC converter for a supercapacitor power supply.
Int. J. Circuit Theory Appl., 2016

15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

CMOS Indoor Light Energy Harvesting System for Wireless Sensing Applications: An Overview.
Proceedings of the Technological Innovation for Cyber-Physical Systems, 2016

2015
A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW.
Proceedings of the Symposium on VLSI Circuits, 2015

A simple class-D audio power amplifier using a passive CT ΣΔ modulator for medium quality sound systems.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

A current-mode VCO-based amplifier-less 2<sup>nd</sup>-order ΔΣ modulator with over 85dB SNDR.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Analysis of a Multi-Ratio Switched Capacitor DC-DC Converter for a Supercapacitor Power Supply.
Proceedings of the Technological Innovation for Cloud-Based Engineering Systems, 2015

2014
A hybrid current-mode passive second-order continuous-time ΣΔ modulator.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

A top-down optimization methodology for SC filter circuit design.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

The design of a light barrier system as an undergraduate laboratory project.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A low power 4<sup>th</sup> order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A Top-Down Optimization Methodology for SC Filter Circuit Design Using Varying Goal Specifications.
Proceedings of the Technological Innovation for Collective Awareness Systems, 2014

2013
A 1.2-V 165-µ W 0.29-mm<sup>2</sup> Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range.
IEEE Trans. Biomed. Circuits Syst., 2013

A simple 1 GHz non-overlapping two-phase clock generators for SC circuits.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

A switched-capacitor biquad using a simple quasi-unity gain amplifier.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

The design of an audio power amplifier as a class project for undergraduate students.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A Switched-Capacitor Band-Pass Biquad Filter Using a Simple Quasi-unity Gain Amplifier.
Proceedings of the Technological Innovation for the Internet of Things, 2013

Design of a 3rd Order 1.5-Bit Continuous-Time Fully Differential Sigma-Delta (ΣΔ) Modulator Optimized for a Class D Audio Amplifier Using Differential Pairs.
Proceedings of the Technological Innovation for the Internet of Things, 2013

Design of a Fully Differential Power Output Stage for a Class D Audio Amplifier Using a Single-Ended Power Supply.
Proceedings of the Technological Innovation for the Internet of Things, 2013

A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications.
Proceedings of the Technological Innovation for the Internet of Things, 2013

2012
Current-mode reference shifting solution for MDAC-based analog-to-digital converters.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Low phase-noise temperature compensated self-biased ring oscillator.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A second-order switched-capacitor ΔΣ modulator using very incomplete settling.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A step-up μ-power converter for solar energy harvesting applications, using Hill Climbing maximum power point tracking.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A DC-DC Step-Up μ-Power Converter for Energy Harvesting Applications, Using Maximum Power Point Tracking, Based on Fractional Open Circuit Voltage.
Proceedings of the Technological Innovation for Sustainability, 2011

A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2008
Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A CMOS variable width short-pulse generator circuit for UWB RADAR applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Switched-Capacitor Multiply-By-Two Amplifier Insensitive to Component Mismatches.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Design of Improved Rail-to-Rail Low-Distortion and Low-Stress Switches in Advanced CMOS Technologies.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
Low-Voltage Low-Power Broadband CMOS Analogue Circuit for White Gaussian Noise Generation.
J. Low Power Electron., 2006

A 0.9V ΔΣ Modulator with 80dB SNDR and 83dB DR Using a Single-Phase Technique.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Optimum Sizing and Compensation of Two-Stage CMOS Amplifiers Based On a Time-Domain Approach.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Switched-capacitor circuits using a single-phase scheme.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

On-chip built-in self-test of video-rate ADCs using Gaussian noise.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003
Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Design methodology for optimization of analog building blocks using genetic algorithms.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1995
Programmable CMOS switched-capacitor biquad using quasi-passive algorithmic DAC's.
IEEE J. Solid State Circuits, June, 1995

1994
High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Charge Programming Techniques for SC Biquads.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


  Loading...