João Goes

Orcid: 0000-0002-8434-8391

According to our database1, João Goes authored at least 124 papers between 1994 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Standard-Cell-Based Neuro-Inspired Integrate-and-Fire Analog-to-Time Converter for Biological and Low-Frequency Signals - Comparison With Analog Version.
IEEE Trans. Biomed. Circuits Syst., August, 2024

Cyber-physical systems security: A systematic review.
Comput. Ind. Eng., 2024

Analog Flat-Level Circuit Synthesis With Genetic Algorithms.
IEEE Access, 2024

Energy-Efficient and High-Performance Data Converters.
Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024

A PVT-Robust Open-loop Gm-Ratio ×16 Gain Residue Amplifier for >1 GS/s Pipelined ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Modular and Configurable Internet of Things Devices for Value Chain Digitalization.
Proceedings of the Technological Innovation for Human-Centric Systems, 2024

2023
A Skew-Insensitive Switched Source-Follower Analog Frontend for Time-Interleaved ADCs.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Predictive Integrators with Thermal Noise Cancellation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Design of an 20 GHz Wide-Band Input Buffer.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology.
Proceedings of the Technological Innovation for Connected Cyber Physical Spaces, 2023

A Standard-Cell-Based Neuro-Inspired Integrate-and-Fire ATC for Biological and Low-Frequency Signals.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
Zoom discrete spectral correlation function, with application to cyclostationary signal detection.
Digit. Signal Process., 2022

A Parasitic Resistance Extraction Tool Leveraged by Image Processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

An Energy-Efficient Wideband Input-Buffer for High-Speed CMOS ADCs.
Proceedings of the Technological Innovation for Digitalization and Virtualization, 2022

2021
Mostly Passive Δ - Σ ADC with a-IGZO TFTs for Flexible Electronics.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Design of a Ring-Amplifier Robust Against PVT Variations in Deep-Nanoscale FinFET CMOS.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

Trade-offs and Limitations in Energy-Efficient Inverter-based CMOS Amplifiers.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

2020
A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

A new family of CMOS inverter-based OTAs for biomedical and healthcare applications.
Integr., 2020

Positive-negative DC-DC converter using amorphous-InGaZnO TFTs.
Int. J. Circuit Theory Appl., 2020

A charge-sharing analog-to-digital converter with embedded downconversion using a variable reference voltage.
Int. J. Circuit Theory Appl., 2020

A Temperature-Compensated Class-AB Parametric Residue Amplifier for SAR-Assisted Pipeline ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Automatic Flat-Level Circuit Generation with Genetic Algorithms.
Proceedings of the Technological Innovation for Life Improvement, 2020

2019
A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Built-in self test of high speed analog-to-digital converters.
IEEE Instrum. Meas. Mag., 2019

Sixth-order differential Sallen-and-Key switched capacitor LPF using a-IGZO TFTs.
Int. J. Circuit Theory Appl., 2019

A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers.
Proceedings of the 16th International Conference on Synthesis, 2019

Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

2018
Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Continuous-Time Delta-Sigma Modulators Based on Passive RC Integrators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A High-resolution Δ-Modulator ADC with Oversampling and Noise-shaping for IoT.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

A Voltage Controlled Oscillator Using IGZO Thin-Film Transistors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System.
IEEE Trans. Educ., 2017

A Third-Order MASH $\Sigma \Delta $ Modulator Using Passive Integrators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Introduction to the special issue on PRIME 2016 and SMACD 2016.
Integr., 2017

Threshold voltage extraction techniques adaptable from sub-micron CMOS to large-area oxide TFT technologies.
Int. J. Circuit Theory Appl., 2017

A robust fully-dynamic residue amplifier for two-stage SAR assisted pipeline ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A two-step radio receiver architecture fully embedded into a charge-sharing SAR ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Microneedle Based ECG - Glucose Painless MEMS Sensor with Analog Front End for Portable Devices.
Proceedings of the Technological Innovation for Smart Systems, 2017

2016
Noise canceling LNA with gain enhancement by using double feedback.
Integr., 2016

A high-gain, high-speed parametric residue amplifier for SAR-assisted pipeline ADCs.
Proceedings of the 13th International Conference on Synthesis, 2016

Advanced amplification techniques for nanoscale CMOS in the context of IoT node sensors.
Proceedings of the 2016 MIXDES, 2016

15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Wideband noise cancelling balun LNA with feedback biasing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

TCAD Simulation of Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors.
Proceedings of the Technological Innovation for Cyber-Physical Systems, 2016

Oxide TFTs on Flexible Substrates for Designing and Fabricating Analog-to-Digital Converters.
Proceedings of the Technological Innovation for Cyber-Physical Systems, 2016

2015
A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW.
Proceedings of the Symposium on VLSI Circuits, 2015

A simple class-D audio power amplifier using a passive CT ΣΔ modulator for medium quality sound systems.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Automatic design of high-order SC filter circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A voltage-combiners-biased amplifier with enhanced gain and speed using current starving.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Design of a robust general-purpose low-offset comparator based on IGZO thin-film transistors.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A current-mode VCO-based amplifier-less 2<sup>nd</sup>-order ΔΣ modulator with over 85dB SNDR.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A low-voltage voltage-controlled ring-oscillator employing dynamic-threshold-MOS and body-biasing techniques.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Towards Cloud-Based Engineering Systems.
Proceedings of the Technological Innovation for Cloud-Based Engineering Systems, 2015

2014
A hybrid current-mode passive second-order continuous-time ΣΔ modulator.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

Analog-to-Digital Converters with embedded IF mixing using variable reference voltages.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A low power 4<sup>th</sup> order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Stability Improvements in a Rail-to-Rail Input/Output, Constant Gm Operational Amplifier, at 0.4 V Operation, Using the Low-Voltage DTMOS Technique.
Proceedings of the Technological Innovation for Collective Awareness Systems, 2014

Towards Collective Awareness Systems.
Proceedings of the Technological Innovation for Collective Awareness Systems, 2014

A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

A new mismatch-insensitive 1.5-bit MDAC with unity feedback-factor and enhanced performance.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
A 1.2-V 165-µ W 0.29-mm<sup>2</sup> Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range.
IEEE Trans. Biomed. Circuits Syst., 2013

Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Gain enhancement and input parasitic capacitance reduction of single-stage OTAs by using differential voltage combiners.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

Cascode amplifiers with low-gain variability using body-biasing temperature and supply compensation.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

A simple 1 GHz non-overlapping two-phase clock generators for SC circuits.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

A 2.3-dB NF CMOS low voltage LNA optimized for medical applications at 600MHz.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

Double feedforward 0.6 V LNA with high gain and low noise figure.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

A switched-capacitor biquad using a simple quasi-unity gain amplifier.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A Switched-Capacitor Band-Pass Biquad Filter Using a Simple Quasi-unity Gain Amplifier.
Proceedings of the Technological Innovation for the Internet of Things, 2013

Design of Cascode-Based Transconductance Amplifiers with Low-Gain PVT Variability and Gain Enhancement Using a Body-Biasing Technique.
Proceedings of the Technological Innovation for the Internet of Things, 2013

Contributing to the Internet of Things.
Proceedings of the Technological Innovation for the Internet of Things, 2013

A 1.2 V Low-Noise-Amplifier with Double Feedback for High Gain and Low Noise Figure.
Proceedings of the Technological Innovation for the Internet of Things, 2013

A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner.
Proceedings of the Technological Innovation for the Internet of Things, 2013

2012
Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds.
Int. J. Circuit Theory Appl., 2012

Fast and accurate estimation of gain and sample-time mismatches in time-interleaved ADCs using on-chip oscillators.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Current-mode reference shifting solution for MDAC-based analog-to-digital converters.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Balun LNA with continuously controllable gain and with noise and distortion cancellation.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Low phase-noise temperature compensated self-biased ring oscillator.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Raising Awareness for Value Creation Potential in Engineering Research.
Proceedings of the Technological Innovation for Value Creation, 2012

Design of Robust CMOS Amplifiers Combining Advanced Low-Voltage and Feedback Techniques.
Proceedings of the Technological Innovation for Value Creation, 2012

2011
A Fully Integrated and Reconfigurable Architecture for Coherent Self-Testing of High Speed Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A second-order switched-capacitor ΔΣ modulator using very incomplete settling.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

CMOS Fully Differential Feedforward-Regulated Folded Cascode Amplifier.
Proceedings of the Technological Innovation for Sustainability, 2011

A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
An 8-bit 120-MS/s Interleaved CMOS Pipeline ADC Based on MOS Parametric Amplification.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

Fully integrated and reconfigurable architecture for coherent self-testing of IQ ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

MOSFET-only Mixer/IIR filter with gain using parametric amplification.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A CMOS Inverter-Based Self-biased Fully Differential Amplifier.
Proceedings of the Emerging Trends in Technological Innovation, 2010

Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Improved clock-phase generator based on self-biased CMOS logic for time-interleaved SC circuits.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A CMOS variable width short-pulse generator circuit for UWB RADAR applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Switched-Capacitor Multiply-By-Two Amplifier Insensitive to Component Mismatches.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Design of Improved Rail-to-Rail Low-Distortion and Low-Stress Switches in Advanced CMOS Technologies.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
Low-Voltage Low-Power Broadband CMOS Analogue Circuit for White Gaussian Noise Generation.
J. Low Power Electron., 2006

A 0.9V ΔΣ Modulator with 80dB SNDR and 83dB DR Using a Single-Phase Technique.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Optimum Sizing and Compensation of Two-Stage CMOS Amplifiers Based On a Time-Domain Approach.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Switched-capacitor circuits using a single-phase scheme.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

On-chip built-in self-test of video-rate ADCs using Gaussian noise.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003
Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Design methodology for optimization of analog building blocks using genetic algorithms.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
Symbolic techniques applied to switched-current ADCs synthesis.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1995
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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