Oliver Lexter July A. Jose

According to our database, Oliver Lexter July A. Jose authored at least 10 papers between 2021 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A 210-MHz 4.23 fJ Energy/Bit 1-kb Asymmetrical Schmitt-Trigger-Based SRAM Using 40-nm CMOS Process.

Ralph Gerard B. Sangalang, Shiva Reddy, Lean Karlo S. Tolentino, You-Wei Shen, Oliver Lexter July A. Jose, Chua-Chin Wang

IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process.

Chua-Chin Wang, Lean Karlo S. Tolentino, Shao-Wei Lu, Oliver Lexter July A. Jose, Ralph Gerard B. Sangalang, Tzung-Je Lee, Pang-Yen Lou, Wei-Chih Chang

Integr., May, 2023

A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder.

Chua-Chin Wang, Oliver Lexter July A. Jose, Wen-Shou Yang, Ralph Gerard B. Sangalang, Lean Karlo S. Tolentino, Tzung-Je Lee

Circuits Syst. Signal Process., April, 2023

A 1.0 fJ energy/bit single-ended 1 kb 6T SRAM implemented using 40 nm CMOS process.

Chua-Chin Wang, Ralph Gerard B. Sangalang, I-Ting Tseng, Yi-Jen Chiu, Yu-Cheng Lin, Oliver Lexter July A. Jose

IET Circuits Devices Syst., March, 2023

A 99.6 % Duty Cycle High-Resolution DPWM Using Reconfiguring Decoder.

Venkata Naveen Kolakaluri, Oliver Lexter July A. Jose, Chua-Chin Wang

Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

SiC MOSFET High Side Gate Driver Design Using HV CMOS Process.

Oliver Lexter July A. Jose, Jui-Min Kuo, Venkata Naveen Kolakaluri, Chua-Chin Wang

Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Matrix Phase Shift Based DPWM Technique To Achieve 90% Duty Cycle.

Venkata Naveen Kolakaluri, Oliver Lexter July A. Jose, Chua-Chin Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

A Low-Energy 8-bit CLA Realized by Single-Phase ANT Logic.

Durga Srikanth Kamarajugadda, Oliver Lexter July A. Jose, Lung-Jieh Yang, Balasubramanian Esakki, Sivaperumal Sampath, Chua-Chin Wang

Proceedings of the International Conference on IC Design and Technology, 2022

A Novel Constant-pulse Scheme for Synchronous Half-bridge Converter Module.

Oliver Lexter July A. Jose, Venkata Naveen Kolakaluri, Chua-Chin Wang

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021

An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5-μm HV CMOS.

Chua-Chin Wang, Oliver Lexter July A. Jose, Po-Kai Su, Lean Karlo S. Tolentino, Ralph Gerard B. Sangalang, Jessica Velasco, Tzung-Je Lee

Microelectron. J., 2021