Tzung-Je Lee

Orcid: 0000-0001-6870-7406

According to our database1, Tzung-Je Lee authored at least 48 papers between 2004 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
High-Sensitivity PTAT Current Generator Using PTAT and CTAT Current Subtraction Method for Temperature Sensor With Frequency Output.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process.
Integr., May, 2023

A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder.
Circuits Syst. Signal Process., April, 2023

A High Dynamic-Range Readout Circuit with Differential Resistance-to-Time Conversion for Gas Sensor.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

10-bit 250-KS/s M-2M Digital-to-Analog Converter with 4-4-2 Segmentation for Sonar System.
Proceedings of the 20th International SoC Design Conference, 2023

Temperature Sensor with 292.3 nA/°C Sensitivity Using Double Current Subtraction.
Proceedings of the 20th International SoC Design Conference, 2023

High Bandwidth Efficiency FPGA-based Underwater Acoustic Transceiver with Adaptive-SFDR DDFS.
Proceedings of the 20th International SoC Design Conference, 2023

3.2 Gbps Output Driver With Dual Low Voltage Modes and Low Power PVT Compensation Circuit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

91.282% Efficiency SIDO Buck-Buck Converter with Separate Positive and Negative Output Voltage in 40 nm CMOS Process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Real-time IR Image Processing Interface on FPGA with Histogram Equalization and Non-Uniform Correction.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

±3 A Bidirectional Current Sensor for 57.6 V Li-ion Battery Management System of AUV.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

2022
Wide Dynamic Range Temperature Sensor Using High Sensitivity PTAT Current Generator.
Proceedings of the 19th International SoC Design Conference, 2022

Fast-Transient LDO Regulator with RC-less Low-Impedance Buffer and PVT Compensation.
Proceedings of the 19th International SoC Design Conference, 2022

Wide Lock-in Range CDR with Modified DQFD and Coarse-fine Tuning Technique.
Proceedings of the International Conference on IC Design and Technology, 2022

2021
An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5-μm HV CMOS.
Microelectron. J., 2021

High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors.
Circuits Syst. Signal Process., 2021

2˟VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process.
Circuits Syst. Signal Process., 2021

12 V PZE Harvesting Circuit For AUV Using Boost Converter with Resistor Matching Controller.
Proceedings of the 18th International SoC Design Conference, 2021

A 20 GHz 8-bit All-N-Transistor Logic CLA Using 16-nm FinFET Technology.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

A 2.5-GHz 2×VDD 16-nm FinFET Digital Output Buffer with Slew Rate and Duty Cycle Self-Adjustment.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2020
A Slew Rate Enhanced 2 x VDD I/O Buffer With Precharge Timing Technique.
IEEE Trans. Circuits Syst., 2020

2019
A Slew Rate Variation Compensated 2× VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

500 MHz 90 nm CMOS 2 \(\times \) VDD Digital Output Buffer Immunity to Process and Voltage Variations.
Circuits Syst. Signal Process., 2019

High Efficiency Buck Converter with Wide Load Current Range using Dual-Mode of PWM and PSM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Delay-Time-Compensated Peak Detector for Medium-Frequency Band.
Circuits Syst. Signal Process., 2018

2017
A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer.
IEEE Trans. Very Large Scale Integr. Syst., 2017

HV voltage sensor for 16 series li-ion battery cells using chopper stabilized amplifier.
Proceedings of the International SoC Design Conference, 2017

2016
PVT-independent dB-linear reconfigured local-feedback digital variable gain amplifier.
Microelectron. J., 2016

HV switch using differential voltage shaping driver for 13 series li-ion battery cells BMS.
Proceedings of the International SoC Design Conference, 2016

16 Series Li-ion battery cells current sensor.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2016

2015
A ±3.07% frequency variation clock generator implemented using HV CMOS process.
Microelectron. J., 2015

2014
9.9 V ASK Demodulator Using Differential Shaper for High-Impedance Electrode.
Circuits Syst. Signal Process., 2014

32% Slew rate and 27% data rate improved 2×VDD output buffer using PVTL compensation.
Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014

2012
Temperature and process compensated clock generator using feedback TPC bias.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

Linear programmable gain amplifier using reconfiguration local-feedback transconductors.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2010
(1/3) times hboxVDD-to- (3/2) times hboxVDD Wide-Range I/O Buffer Using 0.35- muhboxm 3.3-V CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

2009
Wide-Range 5.0/3.3/1.8-V I/O Buffer Using 0.35-m 3.3-V CMOS Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008
A Phase-Locked Loop with 30% Jitter Reduction Using Separate Regulators.
VLSI Design, 2008

All-MOS ASK Demodulator for Low-Frequency Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A 570-kbps ASK demodulator without external capacitors for low-frequency wireless bio-implants.
Microelectron. J., 2008

Mixed-voltage I/O buffer using 0.35 μm CMOS technology.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Voltage-to-frequency converter with high sensitivity using all-MOS voltage window comparator.
Microelectron. J., 2007

2006
High-sensitivity and high-mobility compact DVB-T receiver for in-car entertainment.
IEEE Trans. Consumer Electron., 2006

An All-MOS High-Linearity Voltage-to-Frequency Converter Chip With 520-kHz/V Sensitivity.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

An Implantable SOC Chip for Micro-stimulating and Neural Signal Recording.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A Linear LDO Regulator with Modified NMCF Frequency Compensation Independent of Off-chip Capacitor and ESR.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
A multiparameter implantable microstimulator SOC.
IEEE Trans. Very Large Scale Integr. Syst., 2005

2004
High-PSR bias circuitry for NTSC sync separation.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004


  Loading...