Pabitra Das
Orcid: 0000-0002-3511-5671
According to our database1,
Pabitra Das
authored at least 25 papers
between 2015 and 2025.
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Bibliography
2025
Inductive GNN-Based Methodology for Accurate and Fast Average Power Estimation of Synthesized ASIC Designs From RTL Simulation Bypassing Gate-Level Simulation.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2025
Noninvasive Methodology for the Age Estimation of ICs Using Gaussian Process Regression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2025
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025
XVPE-Net: A Novel Methodology for Interpretable Vital Parameter and Cuffless Blood Pressure Estimation from PPG Signal.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
REVBiT 2.0: REVerse Engineering of BiTstream for LUT Extraction, Boolean Logic, and Pin Combination Identification.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
A Novel Methodology for Obstructive Sleep Apnea Detection from ECG using Deep Learning Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
A Novel Deep-Learning Method for Obstructive Sleep Apnea Detection from Single Channel Photoplethysmography.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
Hardware-Aware Network Adaptation using Width and Depth Shrinking including Convolutional and Fully Connected Layer Merging.
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
P2E-LGAN: PPG to ECG Reconstruction Methodology using LSTM based Generative Adversarial Network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
ANN-based Accurate and Fast Post-Route QoR Data Prediction Methodology from Pre-Clock Tree Synthesis by Skipping CTS and Routing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
GRILAPE: Graph Representation Inductive Learning-based Average Power Estimation for Frontend ASIC RTL Designs.
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023
Energy-Efficient High-Speed Architecture for Vehicle Speed Prediction Using Microcontrollers.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
GRASPE: Accurate Post-Synthesis Power Estimation from RTL using Graph Representation Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
GLAAPE: Graph Learning Assisted Average Power Estimation for Gate-level Combinational Designs.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022
2021
Deep neural network for automated simultaneous intervertebral disc (IVDs) identification and segmentation of multi-modal MR images.
Comput. Methods Programs Biomed., 2021
2020
Biomed. Signal Process. Control., 2020
2017
Rician noise removal in magnitude MRI images using efficient anisotropic diffusion filtering.
Int. J. Imaging Syst. Technol., 2017
2015
An efficient hardware design of SIFT algorithm using fault tolerant reversible logic.
Proceedings of the 2nd IEEE International Conference on Recent Trends in Information Systems, 2015