Pablo Sanchez

According to our database1, Pablo Sanchez authored at least 15 papers between 1996 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Parallel Native-Simulation for Multi-processing Embedded Systems.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2008
Post traumatic brain perfusion SPECT analysis using reconstructed ROI maps of radioactive microsphere derived cerebral blood flow and statistical parametric mapping.
BMC Medical Imaging, 2008

Integration of domain-specific models into a MDA framework for time-critical embedded systems.
Proceedings of the International Workshop on Intelligent Solutions in Embedded Systems, 2008

Identifying bioentity recognition errors of rule-based text-mining systems.
Proceedings of the Third IEEE International Conference on Digital Information Management (ICDIM), 2008

Optimized coverage-directed random simulation.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

2006
Assertion checking of control dominated systems with nonlinear solvers.
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

Assertion-based Verification of Behavioral Descriptions with Non-linear Solver.
Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

2005
Verification of Embedded Systems Based on Interval Analysis.
Int. J. Parallel Program., 2005

Extended abstract: polynomial model-based evaluation of the branch coverage metric for functional verification of hardware systems.
Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005

Assertion Checking of Behavioral Descriptions with Non-linear Solver.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Formal meaning of coverage metrics in simulation-based hardware design verification.
Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

2003
Functional vector generation for assertion-based verification at behavioral level using interval analysis.
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

2000
Using a Soft Core in a SoC Design: Experiences with picoJava.
IEEE Des. Test Comput., 2000

Embedded hardware and software self-testing methodologies for processor cores.
Proceedings of the 37th Conference on Design Automation, 2000

1996
System Level Fault Simulation.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996


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