Patrick Vogelmann

IEEE Trans. Circuits Syst., 2020

A 14b, Twofold Time-Interleaved Incremental ΔΣ ADC Using Hardware Sharing.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst., 2020

Design Approach for Ring Amplifiers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst., 2020

FIR DACs in CT Incremental Delta-Sigma Modulators.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

An Automated Design Environment for CT Incremental Sigma-Delta ADCs.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019

On the Signal Filtering Property of CT Incremental Sigma-Delta ADCs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Dynamic Power Reduction Technique for Incremental $\Delta\Sigma$ Modulators.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2019

Incremental Sturdy-MASH Sigma-Delta Modulator with Reduced Sensitivity to DAC Mismatch.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 94.3-dB SFDR, 91.5-dB DR, and 200-kS/s CT Incremental Delta-Sigma Modulator With Differentially Reset FIR Feedback.

[BibT_eX]

[DOI]

Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018

Improved SQNR and MSA in Incremental ΔΣ Modulators by Using a Recuperation Phase.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2018

On the Optimization of DT Incremental Sigma-Delta Modulators in Combination with CoI Reconstruction Filters.

[BibT_eX]

[DOI]

Proceedings of the 2018 New Generation of CAS, 2018

A 1.1mW 200kS/s incremental ΔΣ ADC with a DR of 91.5dB using integrator slicing for dynamic power reduction.

[BibT_eX]

[DOI]

Michael Haas