Maurits Ortmanns
Orcid: 0000-0002-3547-1596Affiliations:
- University of Ulm, Germany
According to our database1,
Maurits Ortmanns
authored at least 273 papers
between 2001 and 2024.
Collaborative distances:
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on uni-ulm.de
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on orcid.org
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Bibliography
2024
IEEE Trans. Biomed. Circuits Syst., April, 2024
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2023
Frequency-Domain Analysis of Reconfigured Incremental ΔΣ ADCs on the Example of the Exponential Phase.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023
Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023
IEEE Trans. Circuits Syst. II Express Briefs, April, 2023
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
NeuroBus - Architecture and Communication Bus for an Ultra-Flexible Neural Interface.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Optimum Position of Digital DAC Error Correction relative to the Decimation Filter in ΔΣ ADCs.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
VE-FIDES: Designing Trustworthy Supply Chains Using Innovative Fingerprinting Implementations.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
An Integrator-Differentiator Transimpedance Amplifier Using Tunable Linearized High-Value Multi-Element Pseudo-Resistors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A Direct Digitizing Chopped Neural Recorder Using a Body-Induced Offset Based DC Servo Loop.
IEEE Trans. Biomed. Circuits Syst., 2022
A 0.9-V DAC-Calibration-Free Continuous-Time Incremental Delta-Sigma Modulator Achieving 97-dB SFDR at 2 MS/s in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Complexity Reduced LUT-Based DAC Correction in Continuous-Time Delta-Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
PUF-Entropy Extraction of DAC Intersymbol-Interference using Continuous-Time Delta-Sigma ADCs.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
An Onchip Electrode Impedance Estimation achieving 1.2 dB 3σ-Accuracy with Minimum Hardware Overhead.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
2021
IEEE Trans. Inf. Forensics Secur., 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A Chopped Neural Front-End Featuring Input Impedance Boosting With Suppressed Offset-Induced Charge Transfer.
IEEE Trans. Biomed. Circuits Syst., 2021
Erratum to "A High-Voltage Compliance, 32-Channel Digitally Interfaced Neuromodulation System-on-Chip".
IEEE J. Solid State Circuits, 2021
A High-Voltage Compliance, 32-Channel Digitally Interfaced Neuromodulation System on Chip.
IEEE J. Solid State Circuits, 2021
Compensation of Finite GBW in CT Bandpass SDMs based on Single-OpAmp Resonators with Positive-Feedback.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Using Polynomial Interpolation for Reproducing Multi-Valued Responses of Physical Unclonable Functions on FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
A Comparative Study of Noise Behavior in Single-Opamp Resonators in Delta-Sigma Modulators.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Nonlinearity Modeling for Mixed-Signal Inference Accelerators in Training Frameworks.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Wideband and Low-Power Delta-Sigma ADCs: State of the Art, Trends and Implementation Examples.
Proceedings of the 47th ESSCIRC 2021, 2021
A 0.9-V Calibration-Free 97dB-SFDR 2-MS/s Continuous Time Incremental Delta-Sigma ADC Utilizing Variable Bit Width Quantizer in 28nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Circuits Syst., 2020
Normalization and Multi-Valued Symbol Extraction From RO-PUFs for Enhanced Uniform Probability Distributions.
IEEE Trans. Circuits Syst., 2020
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance.
IEEE J. Solid State Circuits, 2020
A Self-Compensated, Low-Offset Voltage Buffer for Input Impedance Boosting in Chopped Neural Front-Ends.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Comparison of Measurement and Readout Strategies for RO-PUFs on Xilinx Zynq-7000 SoC FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Live Demonstration: Generating FPGA Fingerprints Utilizing Full-Chip Characterization with Ring-Oscillator PUFs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A Comparative Study of ISI Errors in Different DAC Structures for CT Delta-Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
IEEE J. Solid State Circuits, 2019
A Continuous-Time Delta-Sigma Modulator Using a Modified Instrumentation Amplifier and Current Reuse DAC for Neural Recording.
IEEE J. Solid State Circuits, 2019
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
An Evaluation Study of Various Excitation Signals for Electrical Impedance Spectroscopy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Incremental Sturdy-MASH Sigma-Delta Modulator with Reduced Sensitivity to DAC Mismatch.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Comparison of Different Precision Pseudo Resistor Realizations in the DC-Feedback of Capacitive Transimpedance Amplifiers.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019
An Integrated Readout for Current Sensing based on a Σ∆ Modulator with Switched Capacitor Feedback.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
A 94.3-dB SFDR, 91.5-dB DR, and 200-kS/s CT Incremental Delta-Sigma Modulator With Differentially Reset FIR Feedback.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
A 24-Ch. Multi-Electrode Array Allowing Fast EIS to Determine Transepithelial Electrical Resistance.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 0.4-V G<sub>m</sub>-C Proportional-Integrator-Based Continuous-Time ΔΣ Modulator With 50-kHz BW and 74.4-dB SNDR.
IEEE J. Solid State Circuits, 2018
A 0.1% THD, 1-MΩ to 1-GΩ Tunable, Temperature-Compensated Transimpedance Amplifier Using a Multi-Element Pseudo-Resistor.
IEEE J. Solid State Circuits, 2018
A Nyquist Rate SAR ADC Employing Incremental Sigma Delta DAC Achieving Peak SFDR = 107 dB at 80 kS/s.
IEEE J. Solid State Circuits, 2018
Evaluation of Frontend Readout Circuits for High Performance Automotive MEMS Accelerometers.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018
On the Optimization of DT Incremental Sigma-Delta Modulators in Combination with CoI Reconstruction Filters.
Proceedings of the 2018 New Generation of CAS, 2018
Proceedings of the 2018 New Generation of CAS, 2018
A Feasibility Study of Digital Beamforming for 5G mmWave Massive MIMO Base Station Receivers.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
A 1.1mW 200kS/s incremental ΔΣ ADC with a DR of 91.5dB using integrator slicing for dynamic power reduction.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
An 8-channel 13GHz ESR-on-a-Chip injection-locked vco-array achieving 200μM-concentration sensitivity.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Comparison Study of Integrated Potentiostats: Resistive-TIA, Capacitive-TIA, CT ΣΔ Modulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A High-Resolution Delta-Sigma D/A Converter Architecture with High Tolerance to DAC Mismatch.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Gain Mismatch Insensitive Time-Interleaved DAC for CT Delta Sigma Modulator by application of a Three-State DAC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Interferer Induced Jitter Reduction in Bandpass CT ΣΔ Modulators for Receiver Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
An Analog High-Speed Single-Cycle Lock-in Amplifier for Next Generation AFM Experiments.
Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018
An Integrator-Differentiator TIA Using a Multi-Element Pseudo-Resistor in its DC Servo Loop for Enhanced Noise Performance.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
Study of Compressed Sensing and Predictor Techniques for the Compression of Neural Signals under the Influence of Noise.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018
A Low Distortion Continuous Time Sigma Delta Modulator using a High Input Impedance Instrumentation Amplifier for Neural Recording.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
Efficient implementation and stability analysis of a HV-CMOS current/voltage mode stimulator.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
2017
Integrated Circuit Technology for Next Generation Point-of-Care Spectroscopy Applications.
IEEE Commun. Mag., 2017
Evaluation of spike sorting and compression for digitally reconfigurable non-uniform quantization.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Digital interferer suppression and jitter reduction in continuous-time bandpass ΣΔ modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017
VCO-based ESR-on-a-chip as a tool for low-cost, high-sensitivity point-of-care diagnostics.
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017
A transimpedance amplifier using a widely tunable PVT-independent pseudo-resistor for high-performance current sensing applications.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Evaluation of logarithmic vs. linear ADCs for neural signal acquisition and reconstruction.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
Evaluation of single-bit sigma-delta modulator DAC for electrical impedance spectroscopy.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
VCO-based ESR-on-a-chip as a tool for low-cost, high-sensitivity food quality control.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
A -245 dB FOM 48 fs rms jitter semi-digital PLL with intrinsic temperature compensation in 130 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2016
Exploiting Weak PUFs From Data Converter Nonlinearity - E.g., A Multibit CT ΔΣ Modulator.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
A 10 MHz Bandwidth, 70 dB SNDR Continuous Time Delta-Sigma Modulator With Digitally Improved Reconfigurable Blocker Rejection.
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
28.2 A 14GHz battery-operated point-of-care ESR spectrometer based on a 0.13µm CMOS ASIC.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A bidirectional neural interface IC with high voltage compliance and spectral separation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A tunable, robust pseudo-resistor with enhanced linearity for scanning ion-conductance microscopy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Phase noise vs. jitter analysis in continuous-time LP and BP ΣΔ modulators with interferers.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
An array of fully-integrated quadrature TX/RX NMR field probes for MRI trajectory mapping.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
A bidirectional neural interface featuring a tunable recorder and electrode impedance estimation.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
2015
Estimation of Non-Idealities in Sigma-Delta Modulators for Test and Correction Using Unscented Kalman Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
A BW-tracking semi-digital PLL with near-optimal VCO phase noise shaping in low-cost 0.4 µm CMOS achieving 700 fs rms phase jitter.
Proceedings of the Nordic Circuits and Systems Conference, 2015
A 10-bit reference free current mode SAR ADC with 58.4 dB SFDR at 50 MS/s in 90 nm CMOS.
Proceedings of the Nordic Circuits and Systems Conference, 2015
Finite GBW compensation technique for CT ΔΣ modulators with differentiator based ELD compensation.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A multimode CT ΔΣ-modulator with a reconfigurable digital feedback filter for semi-digital blocker/interferer rejection.
Proceedings of the ESSCIRC Conference 2015, 2015
2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
A Genetic Algorithm for the Estimation of Nonidealities in Continuous-Time Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
IEEE Trans. Biomed. Circuits Syst., 2014
A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW.
IEEE J. Solid State Circuits, 2014
A high open loop gain common mode feedback technique for fully differential amplifiers.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
A spherical simplex unscented Kalman filter with smart sigma-point processing for estimations in CT ΣΔ modulators.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
A high resolution transimpedance amplifier for use in a 10-bit 200 MS/s current mode SAR ADC.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A square root unscented Kalman filter for estimating DAC and loopfilter nonidealities in continuous-time sigma-delta modulators.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Performance evaluation of a low power optical wireless link for biomedical data transfer.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Multistimulator backchannel communication link implemented for safety information and closed-loop power management.
Proceedings of the 2014 IEEE International Conference on Control System, 2014
A neural recorder IC with HV input multiplexer for voltage and current stimulation with 18V compliance.
Proceedings of the ESSCIRC 2014, 2014
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
Live demonstration: In vivo verification of a 100 Mbps transcutaneous optical telemetric link.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
2013
Introduction to the Special Issue on the 2012 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2013
Design of high speed high-voltage drivers based on stacked standard CMOS for various supply voltages.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
A multi-channel neural stimulator with resonance compensated inductive receiver and closed-loop smart power management.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Concurrent estimation of amplifier nonidealities and excess loop delay in continuous-time sigma-delta modulators.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
A DAC cell with improved ISI and noise performance using native switching for multi-bit CT Delta Sigma modulators.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Analysis and design of high speed/high linearity continuous time delta-sigma modulator.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Calculating transfer functions of CT sigma-delta modulators with arbitrary DAC waveforms.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
An advanced unscented Kalman filter algorithm for parameter estimation in continuous-time sigma-delta modulators.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Discrete-time simulation of continuous-time ΣΔ modulators with arbitrary input signals.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013
Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013
2012
Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, 2012
A Neural Stimulator Frontend With High-Voltage Compliance and Programmable Pulse Shape for Epiretinal Implants.
IEEE J. Solid State Circuits, 2012
Integrated transmission lines for complementary cross-coupled bandpass filters in ΣΔ modulators.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
A power/area-starved complementary-cross-coupled filter for integrated transmission line ΣΔ modulators.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
PVT robust design of wideband CT delta sigma modulators including finite GBW compensation.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
A 72dB-DR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Session 11 overview: Sensors and MEMS: Imagers, MEMS, medical and displays subcommittee.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Digitally-switched resonators for bandpass integrated transmission line ΣΔ modulators.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2.4GHz super-regeneration amplifier with degenerative quenching technique for RF-pulse width transceiver.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
An error estimation technique for lowpass and bandpass ΣΔ ADC feedback DACs using a residual test signal.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
A power efficient MDAC design with correlated double sampling for a 2-step-flash ADC.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
A front-end circuit with active spike and LFP separation via a switched capacitor filter structure for neural recording applications.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Performance tuning of multi-bit continuous time ΣΔ-modulators using a switched system model.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Joint estimation of filter nonidealities in continuous-time sigma-delta modulators by using an unscented Kalman filter.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Evaluating the influence of the bit error rate on the information of neural spike signals.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Discrete-time simulation of arbitrary digital/analog converter waveforms in continuous-time sigma-delta modulators.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
A 9.6 GS/s 112 mW 58 dB DR 150 MHz bandwidth RF bandpass transmission line ΣΔ modulator.
Proceedings of the 38th European Solid-State Circuit conference, 2012
A multichannel neurostimulator with transcutaneous closed-loop power control and self-adaptive supply.
Proceedings of the 38th European Solid-State Circuit conference, 2012
Recent advances in power efficient output stage for high density implantable stimulators.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012
Distributed clock gating for power reduction of a programmable waveform generator for neural stimulation.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012
2011
A Temperature and Process Compensated Ultralow-Voltage Rectifier in Standard Threshold CMOS for Energy-Harvesting Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
A Correlation-Based Background Error Estimation Technique for Bandpass Delta-Sigma ADC DACs.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
An 8.5 mW Continuous-Time ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR.
IEEE J. Solid State Circuits, 2011
A neural stimulator front-end with arbitrary pulse shape, HV compliance and adaptive supply requiring 0.05mm<sup>2</sup> in 0.35μm HVCMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
An AC-powered optical receiver consuming 270μW for transcutaneous 2Mb/s data transfer.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
An 8mW 50MS/s CT ΔΣ modulator with 81dB SFDR and digital background DAC linearization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A novel optimization method for CT sigma-delta-modulators using a switched system model.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
3.1GHz-3.8GHz integrated transmission line super-regeneration amplifier with degenerative quenching technique for impulse-FM-UWB transceiver.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
Background DAC Error Estimation Using a Pseudo Random Noise Based Correlation Technique for Sigma-Delta Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
IEEE Trans. Biomed. Circuits Syst., 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Hardware complexity of a correlation based background DAC error estimation technique for sigma-delta ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
A Background DAC Error Estimation in Sigma-Delta ADCs using a Pseudo Random Noise based Correlation Technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
A Comparative Study on Excess-Loop-Delay Compensation Techniques for Continuous-Time Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
A Field-Programmable Analog Array of 55 Digitally Tunable OTAs in a Hexagonal Lattice.
IEEE J. Solid State Circuits, 2008
A Continuous-Time Hexagonal Field-Programmable Analog Array in 0.13μm CMOS with 186MHz GBW.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Analysis of digital gain error compensation in continuous-time cascaded sigma-delta modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
On the Implicit Anti-Aliasing Feature of Continuous-Time Cascaded Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
A 232-Channel Visual Prosthesis ASIC with Production-Compliant Safety and Testability.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Noise-Shaping Sigma-Delta Modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
A Continuous-Time Field Programmable Analog Array Using Parasitic Capacitance Gm-C Filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 25th International Conference on Computer Design, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
A 0.1mm<sup>2</sup>, Digitally Programmable Nerve Stimulation Pad Cell with High-Voltage Capability for a Retinal Implant.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
A retina stimulator ASIC with 232 electrodes, custom ESD protection and active charge balancing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
A continuous-time ΣΔ Modulator with reduced sensitivity to clock jitter through SCR feedback.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Increased jitter sensitivity in continuous- and discrete-time Sigma-Delta modulators due to finite opamp settling speed.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
IEEE J. Solid State Circuits, 2003
Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Influence of finite integrator gain bandwidth on continuous-time sigma delta modulators.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Compensation of the influence of finite gain-bandwidth on continuous-time sigma-delta modulators.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
A power optimized decimator architecture for cascaded sigma-delta analog-to-digital converters.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
A continuous-time sigma-delta modulator with switched capacitor controlled current mode feedback.
Proceedings of the ESSCIRC 2003, 2003
2002
A new kind of low-power multibit third order continuous-time lowpass Sigma-Delta modulator.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Figure of merit based design strategy for low-power continuous-time Sigma-Delta modulators.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001