Pedro Miguens Matutino

Orcid: 0000-0001-6518-1306

According to our database1, Pedro Miguens Matutino authored at least 10 papers between 2008 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
A Novel Photovoltaic Maximum Power Point Tracking Method Using Feedback Conductance Integral Compensation.
Proceedings of the Technological Innovation for Digitalization and Virtualization, 2022

2017
Pipelined FPGA coprocessor for elliptic curve cryptography based on residue number system.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

2015
Arithmetic-Based Binary-to-RNS Converter Modulo {2<sup>n</sup>±k} for jn-bit Dynamic Range.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2014
An Efficient Scalable RNS Architecture for Large Dynamic Ranges.
J. Signal Process. Syst., 2014

ROM-less RNS-to-binary converter moduli {2<sup>2n</sup> - 1, 2<sup>2n</sup> + 1, 2<sup>n</sup> - 3, 2<sup>n</sup> + 3}.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

2013
A compact and scalable RNS architecture.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
RNS Arithmetic Units for Modulo {2^n+-k}.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011
Binary-to-RNS Conversion Units for moduli {2^n ± 3}.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010
Arithmetic Units for RNS Moduli {2n-3} and {2n+3} Operations.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2008
An RNS based Specific Processor for Computing the Minimum Sum-of-Absolute-Differences.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008


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