Peikun Wang

Orcid: 0000-0001-6625-7499

According to our database1, Peikun Wang authored at least 7 papers between 2017 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
An Automatic Test Pattern Generation Method for Multiple Stuck-At Faults by Incrementally Extending the Test Patterns.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Logic Optimization Method by Eliminating Redundant Multiple Faults from Higher to Lower Cardinality.
IPSJ Trans. Syst. LSI Des. Methodol., 2020

2019
An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Automatic Test Pattern Generation for Double Stuck-at Faults Based on Test Patterns of Single Faults.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

2018
An ATPG Method for Double Stuck-At Faults by Analyzing Propagation Paths of Single Faults.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017
A Hardware Architecture of Particle Swarm Optimization.
J. Comput., 2017

Test pattern generation for multiple stuck-at faults not covered by test patterns for single faults.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017


  Loading...