Peter Hsu

According to our database1, Peter Hsu authored at least 5 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Bicameral+ Cache: re-assessing split vector and scalar cache designs for increased efficiency.
J. Supercomput., April, 2026

DMD-augmented Unpaired Neural Schrödinger Bridge for Ultra-Low Field MRI Enhancement.
CoRR, March, 2026

2024
The Bicameral Cache: a split cache for vector architectures.
Proceedings of the 30th IEEE International Conference on Parallel and Distributed Systems, 2024

2023
A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

AstriFlash A Flash-Based System for Online Services.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023


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