Philip Pownall

According to our database1, Philip Pownall authored at least 2 papers between 1984 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1999
Practical Application of Formal Verification Techniques on a Frame Mux/Demux Chip from Nortel Semiconductors.
Proceedings of the Correct Hardware Design and Verification Methods, 1999

1984
Applications of Testability Analysis: From ATPG to Critical Delay Path Tracing.
Proceedings of the Proceedings International Test Conference 1984, 1984


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