Piero Franco

According to our database1, Piero Franco authored at least 9 papers between 1991 and 1996.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

1996
Analysis and Detection of Timing Failures in an Experimental Test Chip.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995
An Experimental Chip to Evaluate Test Techniques: Experiment Results.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1994
Three-pattern tests for delay faults.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

On-line delay testing of digital circuits.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

1992
Simple Bounds on Serial Signature Analysis Aliasing for Random Testing.
IEEE Trans. Computers, 1992

1991
Refined Bounds on Signature Analysis Aliasing for Random Testing.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Delay Testing of Digital Circuits by Output Waveform Analysis.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Bounds on Signature Analysis Aliasing for Random Testing.
Proceedings of the 1991 International Symposium on Fault-Tolerant Computing, 1991


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