Pierre Dautriche

According to our database, Pierre Dautriche authored at least 4 papers between 2006 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

22.3 A 20GHz-BW 6b 10GS/s 32mW time-interleaved SAR ADC with Master T&H in 28nm UTBB FDSOI technology.

Stéphane Le Tual, Pratap Narayan Singh, Christophe Curis, Pierre Dautriche

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2011

Analog design trends and challenges in 28 and 20nm CMOS technology.

Pierre Dautriche

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2008

Growing Interest of Advanced Commercial CMOS Technologies for Space and Medical Applications. Illustration with a New Nano-Power and Radiation-Hardened SRAM in 130nm CMOS.

Philippe Roche, Mark Lysinger, Gilles Gasiot, Jean-Marc Daveau, Mehdi Zamanian, Pierre Dautriche

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2006

A Simple Way for Substrate Noise Modeling in Mixed-Signal ICs.

Olivier Valorge, Cristian Andrei, Françis Calmon, Jacques Verdier, Christian Gontrand, Pierre Dautriche

IEEE Trans. Circuits Syst. I Regul. Pap., 2006