Ping K. Ko

According to our database1, Ping K. Ko authored at least 12 papers between 1991 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
The evolution of fabless IC industry in China: Past, present, and future.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

2003
Practical compact modeling approaches and options for sub-0.1 mum CMOS technologies.
Microelectron. Reliab., 2003

Large-signal and phase noise performance analysis of active inductor tunable oscillators.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2001
Development of a viable 3D integrated circuit technology.
Sci. China Ser. F Inf. Sci., 2001

2000
A wide tuning range gated varactor.
IEEE J. Solid State Circuits, 2000

1997
Fully depleted CMOS/SOI device design guidelines for low power applications.
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

1994
Hot-carrier-reliability design guidelines for CMOS logic circuits.
IEEE J. Solid State Circuits, March, 1994

On the Modelling of a CMOS Magnetic Sensor.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Berkeley reliability tools-BERT.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1992
A non-quasi-static MOSFET model for SPICE-AC analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

1991
A charge conserving non-quasi-state (NQS) MOSFET model for SPICE transient analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

A charge sheet capacitance model of short channel MOSFETs for SPICE.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991


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