Piotr Ratuszniak
Orcid: 0000-0001-8792-836X
According to our database1,
Piotr Ratuszniak
authored at least 8 papers
between 2009 and 2025.
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Bibliography
2025
Big Data Acceleration on Tightly Coupled FPGA: An Alternating Least Squares inference Case Study.
Proceedings of the 21st IEEE International Conference on Smart Technologies, 2025
Lightweight deep neural network for navigation safety assessment system detecting small floating objects on sea surface.
Proceedings of the 21st IEEE International Conference on Smart Technologies, 2025
2022
DAPHNE: An Open and Extensible System Infrastructure for Integrated Data Analysis Pipelines.
Proceedings of the 12th Conference on Innovative Data Systems Research, 2022
2018
A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018
2013
Proceedings of the Large-Scale Scientific Computing - 9th International Conference, 2013
2011
Proceedings of the Large-Scale Scientific Computing - 8th International Conference, 2011
2009
Proceedings of the Parallel Processing and Applied Mathematics, 2009
New conception and algorithm of allocation mapping for processor arrays implemented into multi-context FPGA devices.
Proceedings of the International Multiconference on Computer Science and Information Technology, 2009