Ramesh Illikkal

According to our database1, Ramesh Illikkal authored at least 42 papers between 2004 and 2019.

Collaborative distances:



In proceedings 
PhD thesis 



On csauthors.net:


DeepSim: cluster level behavioural simulation model for deep learning.
IJBDI, 2019

A Systematic and Realistic Network-on-Chip Traffic Modeling and Generation Technique for Emerging Many-Core Systems.
IEEE Trans. Multi-Scale Computing Systems, 2018

QoS Management on Heterogeneous Architecture for Multiprogrammed, Parallel, and Domain-Specific Applications.
IEEE Systems Journal, 2017

DeepSim: Cluster Level Behavioral Simulation Model for Deep Learning.
Proceedings of the 15th IEEE Intl Conf on Dependable, 2017

Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

A Case Study on the Communication and Computation Behaviors of Real Applications in NoC-Based MPSoCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

QoS management on heterogeneous architecture for parallel applications.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

A systematic network-on-chip traffic modeling and generation methodology.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

Machine Learning-Based Runtime Scheduler for Mobile Offloading Framework.
Proceedings of the IEEE/ACM 6th International Conference on Utility and Cloud Computing, 2013

OpenCL-Based Remote Offloading Framework for Trusted Mobile Cloud Computing.
Proceedings of the 19th IEEE International Conference on Parallel and Distributed Systems, 2013

TMT: A TLB Tag Management Framework for Virtualized Platforms.
International Journal of Parallel Programming, 2012

SNARF: a social networking-inspired accelerator remoting framework.
Proceedings of the first edition of the MCC workshop on Mobile cloud computing, 2012

Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

PCASA: Probabilistic control-adjusted Selective Allocation for shared caches.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Efficient interaction between OS and architecture in heterogeneous platforms.
Operating Systems Review, 2011

CogniServe: Heterogeneous Server Architecture for Large-Scale Recognition.
IEEE Micro, 2011

HeteroScouts: hardware assist for OS scheduling in heterogeneous CMPs.
Proceedings of the SIGMETRICS 2011, 2011

On the Performance of Tagged Translation Lookaside Buffers: A Simulation-Driven Analysis.
Proceedings of the MASCOTS 2011, 2011

Shared Resource Monitoring and Throughput Optimization in Cloud-Computing Datacenters.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

PIRATE: QoS and performance management in CMP architectures.
SIGMETRICS Performance Evaluation Review, 2010

A Simulation Framework for the Analysis of the TLB Behavior in Virtualized Environments.
Proceedings of the MASCOTS 2010, 2010

Modeling virtual machine performance: challenges and approaches.
SIGMETRICS Performance Evaluation Review, 2009

Virtual platform architectures for resource metering in datacenters.
SIGMETRICS Performance Evaluation Review, 2009

VM3: Measuring, modeling and managing VM shared resources.
Comput. Networks, 2009

Hardware/Software Co-Simulation for Last Level Cache Exploration.
Proceedings of the International Conference on Networking, Architecture, and Storage, 2009

CMPSched$im: Evaluating OS/CMP interaction on shared cache management.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

Rate-based QoS techniques for cache/memory in CMP platforms.
Proceedings of the 23rd international conference on Supercomputing, 2009

HiPPAI: High Performance Portable Accelerator Interface for SoCs.
Proceedings of the 16th International Conference on High Performance Computing, 2009

From chaos to QoS: case studies in CMP resource management.
SIGARCH Computer Architecture News, 2007

Exploring Large-Scale CMP Architectures Using ManySim.
IEEE Micro, 2007

I/O processing in a virtualized platform: a simulation-driven approach.
Proceedings of the 3rd International Conference on Virtual Execution Environments, 2007

QoS policies and architecture for cache/memory in CMP platforms.
Proceedings of the 2007 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2007

Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

Addressing Cache/Memory Overheads in Enterprise Java CMP Servers.
Proceedings of the IEEE 10th International Symposium on Workload Characterization, 2007

Exploring DRAM cache architectures for CMP server platforms.
Proceedings of the 25th International Conference on Computer Design, 2007

Constraint-Aware Large-Scale CMP Cache Design.
Proceedings of the High Performance Computing, 2007

qTLB: Looking Inside the Look-Aside Buffer.
Proceedings of the High Performance Computing, 2007

CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP Platforms.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

Exploring Small-Scale and Large-Scale CMP Architectures for Commercial Java Servers.
Proceedings of the 2006 IEEE International Symposium on Workload Characterization, 2006

Receive Side Coalescing for Accelerating TCP/IP Processing.
Proceedings of the High Performance Computing, 2006

TCP Onloading for Data Center Servers.
IEEE Computer, 2004

ASPEN: Towards Effective Simulation of Threads and Engines in Evolving Platforms.
Proceedings of the 12th International Workshop on Modeling, 2004