Pooran Singh
Orcid: 0000-0002-6391-4163
According to our database1,
Pooran Singh
authored at least 10 papers
between 2012 and 2023.
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Bibliography
2023
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023
2022
Energy Aware Channel Allocation with Spectrum Sensing in Pilot Contamination Analysis for Cognitive Radio Networks.
Int. J. Commun. Networks Inf. Secur., December, 2022
2021
Energy Efficient, Hamming Code Technique for Error Detection/Correction Using In-Memory Computation.
Proceedings of the 25th International Symposium on VLSI Design and Test, 2021
2019
An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM.
Circuits Syst. Signal Process., 2019
2018
Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design.
Integr., 2018
IEEE Access, 2018
2017
J. Low Power Electron., 2017
A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
2015
Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small I<sub>cell</sub> SRAM Using FinFET.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
2012
Appl. Artif. Intell., 2012