Prasun Raha

According to our database, Prasun Raha authored at least 5 papers between 1998 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Safety in Memory Architectures for Autonomy (Invited).

Prasun Raha

Proceedings of the IEEE International Reliability Physics Symposium, 2025

2004

Analysis and design of monolithic, high PSR, linear regulators for SoC applications.

Vishal Gupta, Gabriel A. Rincón-Mora, Prasun Raha

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

2002

A Robust Digital Delay Line Architecture in a 0.13µm CMOS Technology Node for Reduced Design and Process Sensitivities.

Prasun Raha, Scott Randall, Richard Jennings, Bob Helmick, Ajith Amerasekera, Baher Haroun

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

1998

Modeling, Simulation and Design of EOS/ESD Protection Devices and Circuits in Silicon-on-Insulator Technology

Prasun Raha

PhD thesis, 1998

ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips.

Yi-Kan Cheng, Prasun Raha, Chin-Chi Teng, Elyse Rosenbaum, Sung-Mo Kang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998