Yi-Kan Cheng

According to our database1, Yi-Kan Cheng authored at least 14 papers between 1995 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
Configurable analog routing methodology via technology and design constraint unification.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2007
A New Flexible Algorithm for Random Yield Improvement.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2000
A temperature-aware simulation environment for reliable ULSI chipdesign.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Application-Based, Transistor-Level Full-Chip Power Analysis for 700 MHz PowerPC<sup>TM</sup> Microprocessor.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1999
Temperature-driven power and timing analysis for CMOS ULSI circuits.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

An efficient method for hot-spot identification in ULSI circuits.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1998
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997
Electrothermal Simulation and Temperature-Sensitive Reliability Diagnosis for CMOS VLSI Circuits
PhD thesis, 1997

iTEM: a temperature-dependent electromigration reliability diagnosis tool.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
ETS-A: A New Electrothermal Simulator for CMOS VLSI Circuits.
Proceedings of the 1996 European Design and Test Conference, 1996

Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects.
Proceedings of the 33st Conference on Design Automation, 1996

iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips.
Proceedings of the 33st Conference on Design Automation, 1996

1995
Chip-Level Thermal Simulator to Predict VLSI Chip Temperature.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995


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