Przemyslaw Mroszczyk

Orcid: 0000-0002-7586-1839

According to our database1, Przemyslaw Mroszczyk authored at least 11 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2019
Energy Efficient Flash ADC With PVT Variability Compensation Through Advanced Body Biasing.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Adaptive Word Reordering for Low-Power Inter-Chip Communication.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies.
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

Ultra-low swing CMOS transceiver for 2.5-D integrated systems.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

Mismatch Compensation Technique for Inverter-Based CMOS Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2015
Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
Tunable CMOS Delay Gate With Improved Matching Properties.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

The accuracy and scalability of continuous-time Bayesian inference in analogue CMOS circuits.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Tunable CMOS delay gate with reduced impact of fabrication mismatch on timing parameters.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Trigger-wave propagation in arbitrary metrics in asynchronous cellular logic arrays.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012
Trigger-wave collision detecting asynchronous cellular logic array for fast image skeletonization.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012


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