R. P. Agarwal
According to our database1,
R. P. Agarwal
authored at least 8 papers
between 2009 and 2023.
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Bibliography
2023
Numerical approximation of fractional variational problems with several dependent variables using Jacobi poly-fractonomials.
Math. Comput. Simul., 2023
2011
Analytical modeling of subthreshold current and subthreshold swing of an underlap DGMOSFET with tied-independent gate and symmetric-asymmetric options.
Microelectron. J., 2011
Proceedings of the International Conference on Soft Computing for Problem Solving (SocProS 2011) December 20-22, 2011, 2011
Effect of Gate-S/D Underlap, Asymmetric and Independent Gate Features in the Minimization of Short Channel Effects in Nanoscale DGMOSFET.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
2010
Robustness comparison of DG FinFETs with symmetric, asymmetric, tied and independent gate options with circuit co-design for ultra low power subthreshold logic.
Microelectron. J., 2010
Robust and Ultra Low Power Subthreshold Logic Circuits with Symmetric, Asymmetric, 3T, 4T DGFinFETs.
J. Low Power Electron., 2010
Comparison of nano-scale complementary metal-oxide semiconductor and 3T-4T double gate fin-shaped field-effect transistors for robust and energy-efficient subthreshold logic.
IET Circuits Devices Syst., 2010
2009
Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications.
VLSI Design, 2009