Rafael Fao de Moura

Orcid: 0000-0001-5954-9004

According to our database1, Rafael Fao de Moura authored at least 19 papers between 2015 and 2024.

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Bibliography

2024
Reprogrammable Non-Linear Circuits Using ReRAM for NN Accelerators.
ACM Trans. Reconfigurable Technol. Syst., March, 2024

2023
Data and Computation Reuse in CNNs Using Memristor TCAMs.
ACM Trans. Reconfigurable Technol. Syst., March, 2023

Closing the Capacity Gap: A Transforming Technique for ReRAM-Friendly NNs.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

Scalable and Energy-Efficient NN Acceleration with GPU-ReRAM Architecture.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2022
Memristor-only LSTM Acceleration with Non-linear Activation Functions.
Proceedings of the Designing Modern Embedded Systems: Software, Hardware, and Applications, 2022

Exploiting Heterogeneity in PIM Architectures for Data-Intensive Applications.
Proceedings of the Designing Modern Embedded Systems: Software, Hardware, and Applications, 2022

2021
Enabling Near-Data Accelerators Adoption by Through Investigation of Datapath Solutions.
Int. J. Parallel Program., 2021

2020
Analog Memristive CAMs for Area- and Energy-Efficient Reconfigurable Computing.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Leveraging reuse and endurance by efficient mapping and placement for NVM-based FPGAs.
Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

2019
Aggressive Energy Reduction for Video Inference with Software-only Strategies.
ACM Trans. Embed. Comput. Syst., 2019

A Technologically Agnostic Framework for Cyber-Physical and IoT Processing-in-Memory-based Systems Simulation.
Microprocess. Microsystems, 2019

Skipping CNN Convolutions Through Efficient Memoization.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Exploiting Reconfigurable Vector Processing for Energy-Efficient Computation in 3D-Stacked Memories.
Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018
Exploring IoT platform with technologically agnostic processing-in-memory framework.
Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, 2018

Exploiting Partial Reconfiguration on a Dynamic Coarse Grained Reconfigurable Architecture.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
A framework to automatically generate heterogeneous organization reconfigurable multiprocessing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
The Impact of Heterogeneity on a Reconfigurable Multicore System.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015
VANET-based Intersection Control with a Throughput/Fairness Tradeoff.
Proceedings of the 8th IFIP Wireless and Mobile Networking Conference, 2015


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