Rajeswari Devadoss

Orcid: 0000-0001-5918-1289

According to our database1, Rajeswari Devadoss authored at least 7 papers between 2010 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Equivalence Checking and Compaction of n-input Majority Terms Using Implicants of Majority.
J. Electron. Test., 2019

Majority Logic: Prime Implicants and n-Input Majority Term Equivalence.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2017
ReVAMP: ReRAM based VLIW architecture for in-memory computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2011
p-QCA: A Tiled Programmable Fabric Architecture Using Molecular Quantum-Dot Cellular Automata.
ACM J. Emerg. Technol. Comput. Syst., 2011

Architecture and tools for programmable QCA.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

2010
Clocking-Based Coplanar Wire Crossing Scheme for QCA.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

A tiled programmable fabric using QCA.
Proceedings of the International Conference on Field-Programmable Technology, 2010


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