Ramon Tortosa Navas

According to our database1, Ramon Tortosa Navas authored at least 7 papers between 2005 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform.
Microelectron. J., 2008

2007
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
A New High-Level Synthesis Methodology of Cascaded Continuous-Time Sigma Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator.
Proceedings of the IFIP VLSI-SoC 2006, 2006

Design of a 1.2-V cascade continuous-time Delta Sigma modulator for broadband telecommunications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Analysis of clock jitter error in multibit continuous-time ΣΔ modulators with NRZ feedback waveform.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A direct synthesis method of cascaded continuous-time sigma-delta modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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