Ángel Rodríguez-Vázquez
Orcid: 0000-0002-1006-5241Affiliations:
- University of Seville, Spain
According to our database1,
Ángel Rodríguez-Vázquez
authored at least 271 papers
between 1987 and 2023.
Collaborative distances:
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Bibliography
2023
A Low-Latency, Low-Power CMOS Sun Sensor for Attitude Calculation Using Photovoltaic Regime and On-Chip Centroid Computation.
IEEE Trans. Instrum. Meas., 2023
A Pipelining-Based Heterogeneous Scheduling and Energy-Throughput Optimization Scheme for CNNs Leveraging Apache TVM.
IEEE Access, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Load Reduction and Adaptive Pull-Up Strategies for Time Delay Reduction in High-Resolution AER Sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A Model for the Open-Circuit Voltage Dependence on Temperature for Integrated Diodes.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023
A 64×64 SPAD-based 3D Image Sensor with Adaptive Pixel Sensitivity and Asynchronous Readout.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
A self-powered asynchronous image sensor with independent in-pixel harvesting and sensing operations.
Proceedings of the Imaging Sensors and Systems 2023, 2023
2022
IEEE Trans. Instrum. Meas., 2022
A Mobile Platform for Movement Tracking Based on a Fast-Execution-Time Optical-Flow Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A Fully Integrated, Power-Efficient, 0.07-2.08 mA, High-Voltage Neural Stimulator in a Standard CMOS Process.
Sensors, 2022
Architecture-Level Optimization on Digital Silicon Photomultipliers for Medical Imaging.
Sensors, 2022
PixiStamp: A tool to acquire, process, and sequence AER data from event-driven systems.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
Electrical Model of a Wireless mW-Power and Mbps-Data Transfer System Over a Single Pair of Coils.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
On the implementation of in-pixel controlled diodes with sensing and energy harvesting capabilities.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
A Wide-Range, High-Voltage, Floating Level Shifter with Charge Refreshing in a Standard 180 nm CMOS Process.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Experimental Validation of a High-Voltage Compliant Neural Stimulator implemented in a Standard 1.8V/3.3V CMOS Process.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
2021
IEEE Trans. Biomed. Circuits Syst., 2021
Sensors, 2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
Proceedings of the 7th International Conference on Event-Based Control, 2021
2020
Compressive Imaging Using RIP-Compliant CMOS Imager Architecture and Landweber Reconstruction.
IEEE Trans. Circuits Syst. Video Technol., 2020
A Sub- $\mu$ W Reconfigurable Front-End for Invasive Neural Recording That Exploits the Spectral Characteristics of the Wideband Neural Signal.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Biomed. Circuits Syst., 2020
Comparison between Digital Tone-Mapping Operators and a Focal-Plane Pixel-Parallel Circuit.
Signal Process. Image Commun., 2020
PreVIous: A Methodology for Prediction of Visual Inference Performance on IoT Devices.
IEEE Internet Things J., 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Cellular-Neural-Network Focal-Plane Processor as Pre-Processor for ConvNet Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the Imaging Sensors and Systems 2020, 2020
2019
Phase Synchronization Operator for On-Chip Brain Functional Connectivity Computation.
IEEE Trans. Biomed. Circuits Syst., 2019
Guest Editorial: Special Section on the 48th European Solid-State Circuits Conference (ESSCIRC).
IEEE J. Solid State Circuits, 2019
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
On the Correlation of CNN Performance and Hardware Metrics for Visual Inference on a Low-Cost CPU-based Platform.
Proceedings of the International Conference on Systems, Signals and Image Processing, 2019
ToF Estimation Based on Compressed Real-Time Histogram Builder for SPAD Image Sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 13th International Conference on Distributed Smart Cameras, 2019
Proceedings of the 13th International Conference on Distributed Smart Cameras, 2019
Proceedings of the 13th International Conference on Distributed Smart Cameras, 2019
A system for image acquisition and processing operating in the visible and the IR bands.
Proceedings of the 13th International Conference on Distributed Smart Cameras, 2019
Proceedings of the 49th European Solid-State Device Research Conference, 2019
A High TCMRR, Inherently Charge Balanced Bidirectional Front-End for Multichannel Closed-Loop Neuromodulation.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
A 32 Input Multiplexed Channel Analog Front-End with Spatial Delta Encoding Technique and Differential Artifacts Compression.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Int. J. Circuit Theory Appl., 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018
On-The-Fly Deployment of Deep Neural Networks on Heterogeneous Hardware in a Low-Cost Smart Camera.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018
On the characterization of light sources irradiation profiles with an HDR image sensor.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018
Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018
Concurrent focal-plane generation of compressed samples from time-encoded pixel values.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Optimum Network/Framework Selection from High-Level Specifications in Embedded Deep Learning Vision Applications.
Proceedings of the Advanced Concepts for Intelligent Vision Systems, 2018
2017
Arrayable Voltage-Controlled Ring-Oscillator for Direct Time-of-Flight Image Sensors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Biomed. Circuits Syst., 2017
IEEE J. Solid State Circuits, 2017
A Wide Linear Dynamic Range Image Sensor Based on Asynchronous Self-Reset and Tagging of Saturation Events.
IEEE J. Solid State Circuits, 2017
Int. J. Circuit Theory Appl., 2017
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Live demonstration: Photon counting and direct ToF camera prototype based on CMOS SPADs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Proceedings of the Image Sensors and Imaging Systems 2017, 2017
A chaotic switched-capacitor circuit for characteristic CMOS noise distributions generation.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017
2016
Single-Exposure HDR Technique Based on Tunable Balance Between Local and Global Adaptation.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Int. J. Circuit Theory Appl., 2016
High-level Performance Evaluation of Object Detection based on Massively Parallel Focal-plane Acceleration Requiring Minimum Pixel Area Overhead.
Proceedings of the 11th Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications (VISIGRAPP 2016), 2016
Hardware-aware performance evaluation for the co-design of image sensors and vision algorithms.
Proceedings of the 13th International Conference on Synthesis, 2016
In-pixel voltage-controlled ring-oscillator for phase interpolation in ToF image sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Live demonstration: Single-exposure HDR image acquisition based on tunable balance between local and global adaptation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
HDR image sensor with linear response and asynchronous detection of saturation: Demo.
Proceedings of the 10th International Conference on Distributed Smart Camera, 2016
Image Sensing Scheme Enabling Fully-Programmable Light Adaptation and Tone Mapping with a Single Exposure: Demo.
Proceedings of the 10th International Conference on Distributed Smart Camera, 2016
Pixel-wise parameter adaptation for single-exposure extension of the image dynamic range.
Proceedings of the 10th International Conference on Distributed Smart Camera, 2016
Proceedings of the Image Sensors and Imaging Systems 2016, 2016
A high dynamic range linear vision sensor with event asynchronous and frame-based synchronous operation.
Proceedings of the Image Sensors and Imaging Systems 2016, 2016
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Bottom-up performance analysis of focal-plane mixed-signal hardware for Viola-Jones early vision tasks.
Int. J. Circuit Theory Appl., 2015
Real-time single-exposure ROI-driven HDR adaptation based on focal-plane reconfiguration.
Proceedings of the Real-Time Image and Video Processing 2015, 2015
On the calibration of a SPAD-based 3D imager with in-pixel TDC using a time-gated technique.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Live demonstration: Real-time high dynamic range video acquisition using in-pixel adaptive content-aware tone mapping compression.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
Proceedings of the 9th International Conference on Distributed Smart Camera, 2015
Proceedings of the 9th International Conference on Distributed Smart Camera, 2015
Proceedings of the IEEE EUROCON 2015, 2015
Proceedings of the Image Sensors and Imaging Systems 2015, 2015
Proceedings of the Image Sensors and Imaging Systems 2015, 2015
A high dynamic range image sensor with linear response based on asynchronous event detection.
Proceedings of the European Conference on Circuit Theory and Design, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
Focal-Plane Sensing-Processing: A Power-Efficient Approach for the Implementation of Privacy-Aware Networked Visual Sensors.
Sensors, 2014
Form factor improvement of smart-pixels for vision sensors through 3-D vertically-integrated technologies.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Wide range 8ps incremental resolution time interval generator based on FPGA technology.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
In vivo measurements with a 64-channel extracellular neural recording integrated circuit.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Demo: A Prototype Vision Sensor for Real-time Focal-plane Obfuscation through Tunable Pixelation.
Proceedings of the International Conference on Distributed Smart Cameras, 2014
A QVGA Vision Sensor with Multi-functional Pixels for Focal-Plane Programmable Obfuscation.
Proceedings of the International Conference on Distributed Smart Cameras, 2014
Proceedings of the ESSCIRC 2014, 2014
Proceedings of the Image Sensors and Imaging Systems 2014, 2014
Proceedings of the Image Sensors and Imaging Systems 2014, 2014
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
A 330μW, 64-channel neural recording sensor with embedded spike feature extraction and auto-calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2013
A hierarchical vision processing architecture oriented to 3D integration of smart camera chips.
J. Syst. Archit., 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
A 176×120 pixel CMOS vision chip for Gaussian filtering with massivelly Parallel CDS and A/D-conversion.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
2012
IEEE Trans. Ind. Electron., 2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression.
IEEE Trans. Biomed. Circuits Syst., 2012
Int. J. Circuit Theory Appl., 2012
Int. J. Circuit Theory Appl., 2012
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Power-efficient focal-plane image representation for extraction of enriched Viola-Jones features.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
CMOS SPADs selection, modeling and characterization towards image sensors implementation.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
High-speed global shutter CMOS machine vision sensor with high dynamic range image acquisition and embedded intelligence.
Proceedings of the Sensors, 2012
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012
2011
Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 2011 Fifth ACM/IEEE International Conference on Distributed Smart Cameras, 2011
Proceedings of the 2011 Fifth ACM/IEEE International Conference on Distributed Smart Cameras, 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
Image filtering by reduced kernels exploiting kernel structure and focal-plane averaging.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
A CMOS-3D reconfigurable architecture with in-pixel processing for feature detectors.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE International Conference on 3D System Integration, 2010
2009
Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Integrated Circuitry to Detect Slippage Inspired by Human Skin and Artificial Retinas.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Int. J. Circuit Theory Appl., 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the Spatial Temporal Patterns for Action-Oriented Perception in Roving Robots, 2009
2008
Matrix Methods for the Dynamic Range Optimization of Continuous-Time G<sub>m</sub>- C Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform.
Microelectron. J., 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
A Focal-Plane Image Processor for Low Power Adaptive Capture and Analysis of the Visual Stimulus.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Accurate and simple modeling of amplifier dc gain nonlinearity in switched-capacitor circuits.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
A New High-Level Synthesis Methodology of Cascaded Continuous-Time Sigma Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the IEEE International Conference on Virtual Environments, 2006
Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Design of a 1.2-V cascade continuous-time Delta Sigma modulator for broadband telecommunications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Reconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Locust-inspired vision system on chip architecture for collision detection in automotive applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Double-sampling single-loop sigma-delta modulator topologies for broadband applications.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta Modulator for low-power high-linearity automotive sensor ASICs.
IEEE J. Solid State Circuits, 2005
IEEE J. Solid State Circuits, 2005
Analysis of clock jitter error in multibit continuous-time ΣΔ modulators with NRZ feedback waveform.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Reaction-diffusion navigation robot control: from chemical to VLSI analogic processors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
IEEE J. Solid State Circuits, 2004
Int. J. Bifurc. Chaos, 2004
An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
An alternative DFT methodology to test high-resolution Sigma Delta modulators.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A CNN-driven locally adaptive CMOS image sensor.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators.
Proceedings of the 2004 Design, 2004
2003
IEEE Trans. Neural Networks, 2003
IEEE Trans. Neural Networks, 2003
Study of internal electric fields in AlGaAs/GaAs two-dimensional electron gas heterostructures.
Microelectron. J., 2003
Exploration Of Spatial-Temporal Dynamic Phenomena In A 32*32-Cell Stored Program Two-Layer CNN Universal Machine Chip Prototype.
J. Circuits Syst. Comput., 2003
An Improved Elementary Processing Unit For High-Density CNN-Based Mixed-Signal Microprocessors For Vision.
J. Circuits Syst. Comput., 2003
Integr., 2003
Int. J. Neural Syst., 2003
A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time Sigma-Delta modulators.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the ESSCIRC 2003, 2003
Behavioural Modelling and Simulation of SigmaDelta Modulators Using Hardware Description Languages.
Proceedings of the 2003 Design, 2003
2002
Int. J. Circuit Theory Appl., 2002
Int. J. Circuit Theory Appl., 2002
Retinal Processing Emulation in a Programmable 2-Layer Analog Array Processor CMOS Chip.
Proceedings of the Advances in Neural Information Processing Systems 15 [Neural Information Processing Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A processing element architecture for high-density focal plane analog programmable array processors.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Bio-Inspired Analog VLSI Design Realizes Programmable Complex Spatio-Temporal Dynamics on a Single Chip.
Proceedings of the 2002 Design, 2002
2001
Analysis and experimental characterization of idle tones in 2nd-order bandpass Sigma-Delta modulators-a 0.8 um CMOS switched-current case study.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass Sigma-Delta modulators.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
A High-performance sigma-delta ADC for ADSL applications in 0.35 μm CMOS digital technology.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 9th European Symposium on Artificial Neural Networks, 2001
Top-down design of a xDSL 14-bit 4MS/s sigma-delta modulator in digital CMOS technology.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
A CMOS 0.8-μm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion.
IEEE J. Solid State Circuits, 2000
Review of CMOS implementations of the CNN universal machine-type visual microprocessors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Reliable analysis of settling errors in SC integrators-application to the design of high-speed ΣΔ modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the Ninth IEEE International Conference on Fuzzy Systems, 2000
Proceedings of the 2000 Design, 2000
A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits.
Proceedings of the 2000 Design, 2000
1999
J. VLSI Signal Process., 1999
MOST-Based Design and Scaling of Synaptic Interconnections in VLSI Analog Array Processing CNN Chips.
J. VLSI Signal Process., 1999
J. VLSI Signal Process., 1999
An 0.5-µm CMOS Analog Random Access Memory Chip for TeraOPS Speed Multimedia Video Processing.
IEEE Trans. Multim., 1999
A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology.
IEEE J. Solid State Circuits, 1999
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips.
Int. J. Circuit Theory Appl., 1999
Non-ideal quantization noise shaping in switched-current bandpass Sigma-Delta modulators.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the 1999 Design, 1999
1998
Electrooptical measurement system for the DC characterization of visible detectors for CMOS-compatible vision chips.
IEEE Trans. Instrum. Meas., 1998
Int. J. Circuit Theory Appl., 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Practical considerations for the design of cascade multi-bit high-frequency ΣΔ modulators.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
A simplification before and during generation methodology for symbolic large-circuit analysis.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1997
A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage.
IEEE J. Solid State Circuits, 1997
Using CAD tools for shortening the design cycle of high-performance sigma-delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology.
Int. J. Circuit Theory Appl., 1997
An algorithm for numerical reference generation in symbolic analysis of large analog circuits.
Proceedings of the European Design and Test Conference, 1997
1996
1995
IEEE J. Solid State Circuits, July, 1995
Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits.
IEEE J. Solid State Circuits, March, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Secure Communication Through Switched-Current Chaotic Circuits.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1994
IEEE J. Solid State Circuits, August, 1994
J. Intell. Fuzzy Syst., 1994
Modeling OpAmp-Induced Harmonic Distorition for Switched-Capacitor Sigma-Delta Modulator Design.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
1993
IEEE Trans. Neural Networks, 1993
A Tool for Automated Design of Sigma-Delta Modulators Using Statistical Optimization.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
1991
Proceedings of the Artificial Neural Networks, 1991
1990
Int. J. Circuit Theory Appl., 1990
1987