José M. de la Rosa
Orcid: 0000-0003-2848-9226Affiliations:
- University of Seville, IMSE-CNM, Spain (PhD 2000)
According to our database1,
José M. de la Rosa
authored at least 129 papers
between 1997 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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on twitter.com
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on orcid.org
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on id.loc.gov
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on imse.cnm.es
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on isni.org
On csauthors.net:
Bibliography
2024
Design Automation of Analog and Mixed-Signal Circuits Using Neural Networks - A Tutorial Brief.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024
A Small-Area 2nd-Order Adder-Less Continuous-Time ΔΣ Modulator With Pulse Shaping FIR DAC for Magnetic Sensing.
IEEE Open J. Circuits Syst., 2024
2023
Using ANNs to predict the evolution of spectrum occupancy in cognitive-radio systems.
Integr., November, 2023
Ultra-High-Resistance Pseudo-Resistors With Small Variations in a Wide Symmetrical Input Voltage Swing.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2023
Combining Software-Defined Radio Learning Modules and Neural Networks for Teaching Communication Systems Courses.
Inf., 2023
IEEE Access, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Automated Design of Sigma-Delta Converters: From Know-How to AI-assisted Optimization.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Neuromorphic Low-Power Inference on Memristive Crossbars With On-Chip Offset Calibration.
IEEE Access, 2021
Low-Power Compensated Modified Comb Decimation Structure for Power-of-Two Decimation Factors.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Implementation of Binary Stochastic STDP Learning Using Chalcogenide-Based Memristive Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits - Application to Voltage-Controlled Ring Oscillators and Frequency-Based ΣΔ ADCs.
IEEE Trans. Circuits Syst., 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
2019
Guest Editorial Special Issue on the 2019 IEEE International Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Analysis of Linearity in FD-SOI Body-Input Voltage Controlled Ring Oscillators - Application to ADCs.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Guest Editorial Special Issue on the 2018 IEEE International Symposium on Circuits and Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 0.9-V 100-µW Feedforward Adder-Less Inverter-Based MASH ΔΣ Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 2-MS/s, 11.22 ENOB, Extended Input Range SAR ADC With Improved DNL and Offset Calculation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A 2MS/s, 11.22 ENOB, 3.2 V<sub>pp-d</sub> SAR ADC with improved DNL and offset calculation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Circuits Syst. Signal Process., 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Emerging sigma-delta modulation techniques for an efficient digitization in the Internet of Things.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017
2016
High-level optimization of ΣΔ modulators using multi-objetive evolutionary algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Live demonstration: High-level optimization of ΣΔ modulators using multi-objetive evolutionary algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Design of a power-efficient widely-programmable Gm-LC band-pass sigma-delta modulator for SDR.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
A Fast Readout Electronic System for Accurate Spatial Detection in Ion Beam Tracking for the Next Generation of Particle Accelerators.
IEEE Trans. Instrum. Meas., 2015
Guest Editorial: Special Section on the 2014 IEEE Custom Integrated Circuits Conference (CICC 2014).
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
Simulation-based comparison of CNT-FETs and G-FETs from a circuit designer's perspective.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the IEEE EUROCON 2015, 2015
2014
LC-Based Bandpass Continuous-Time Sigma-Delta Modulators With Widely Tunable Notch Frequency.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Guest Editorial - Special Section on the 2013 IEEE Custom Integrated Circuits Conference (CICC 2013).
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Efficient hybrid continuous-time/discrete-time cascade ΣΔ modulators for wideband applications.
Microelectron. J., 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Behavioral modelling of a 4<sup>th</sup> order LP ΣΔ modulator-towards the design of a hybrid proposal.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
An overview of decimator structures for efficient sigma-delta converters: Trends, design issues and practical solutions.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Design considerations of bandpass CT ΣΔ modulators for software-defined-radio receivers.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Live demonstration: Using SIMULINK S-functions for the efficient modeling and simulation of analog integrated circuits and systems.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Design and experimental results of a preamplifier for particles tracking in secondary electron detectors.
Microelectron. J., 2013
Band-pass continuous-time ΣΔ modulators with widely tunable notch frequency for efficient RF-to-digital conversion.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Power and area efficient comb-based decimator for Sigma-Delta ADCs with high decimation factors.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Undersampling RF-to-digital CT ΣΔ modulator with tunable notch frequency and simplified raised-cosine FIR feedback DAC.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
High-Efficiency Cascade ΣΔ Modulators for the Next Generation Software-Defined-Radio Mobile Systems.
IEEE Trans. Instrum. Meas., 2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Efficient biasing circuit strategies for inductorless wideband low noise amplifiers with feedback.
Microelectron. J., 2012
A 0.2-to-2MHz BW, 50-to-86dB SNDR, 16-to-22mW flexible 4<sup>th</sup>-order ΣΔ modulator with DC-to-44MHz tunable center frequency in 1.2-V 90-nm CMOS.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012
Welcome to the 55<sup>th</sup> IEEE international midwest symposium on circuits and systems (MWSCAS 2012).
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Hybrid continuous-time/discrete-time circuit techniques for the efficient implementation of wideband ΣΔ ADCs.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
A power-scalable concurrent cascade 2-2-2 SC ΣΔ modulator for Software Defined Radio.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
A preamplifier for the front-end readout system of particles tracking in secondary electron detectors.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Efficient Hybrid Continuous-Time/Discrete-Time ∑ Δ Modulators for Broadband Wireless Telecom Systems.
Proceedings of the Technological Innovation for Value Creation, 2012
A teamwork-based education strategy for teaching lab of analog integrated circuits design.
Proceedings of the IEEE Global Engineering Education Conference, 2012
Using nanoHUB.org for teaching and learning nanoelectronic devices in materials engineering.
Proceedings of the IEEE Global Engineering Education Conference, 2012
Using behavioral modeling and simulation for learning communication circuits and systems.
Proceedings of the IEEE Global Engineering Education Conference, 2012
2011
Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Multirate hybrid continuous-time/discrete-time cascade 2-2 ΣΔ modulator for wideband telecom.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011
Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade 2-2 Sigma-Delta Modulators for Wideband Telecom.
Proceedings of the VLSI-SoC: Advanced Research for Systems on Chip, 2011
Design considerations and experimental results of continuously-tuned reconfigurable CMOS LNAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
A 0.13 µm CMOS adaptive sigma-delta modulator for triple-mode GSM/Bluetooth/UMTS applications.
Microelectron. J., 2010
Multirate hybrid CT/DT cascade ΣΔ modulators with decreasing OSR of back-end DT stages.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
A 100kHz-10MHz BW, 78-to-52dB DR, 4.6-to-11mW flexible SC ΣΔ modulator in 1.2-V 90-nm CMOS.
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
Adaptive CMOS analog circuits for 4G mobile terminals - Review and state-of-the-art survey.
Microelectron. J., 2009
Hybrid Continuous-Time/Discrete-Time Cascade SigmaDelta Modulators with Programmable Resonation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Adaptive CMOS LNAs for Beyond-3G RF Receivers - A Multi-standard GSM/WCDMA/BT/WLAN Case Study.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2008
Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform.
Microelectron. J., 2008
Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK.
Integr., 2008
A Triple-Mode Reconfigurable Sigma-Delta Modulator for Multi-Standard Wireless Applications.
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Design of a 130-nm CMOS Reconfigurable Cascade Sigma Delta Modulator for GSM/UMTS/Bluetooth.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
A New High-Level Synthesis Methodology of Cascaded Continuous-Time Sigma Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Design of a 1.2-V cascade continuous-time Delta Sigma modulator for broadband telecommunications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Reconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta Modulator for low-power high-linearity automotive sensor ASICs.
IEEE J. Solid State Circuits, 2005
Analysis of clock jitter error in multibit continuous-time ΣΔ modulators with NRZ feedback waveform.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
An alternative DFT methodology to test high-resolution Sigma Delta modulators.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time Sigma-Delta modulators.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Description Languages and Tools for the Behavioural Simulation of SD Modulators: a Comparative Survey.
Proceedings of the Forum on specification and Design Languages, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Analysis and experimental characterization of idle tones in 2nd-order bandpass Sigma-Delta modulators-a 0.8 um CMOS switched-current case study.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass Sigma-Delta modulators.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
A High-performance sigma-delta ADC for ADSL applications in 0.35 μm CMOS digital technology.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
A CMOS 0.8-μm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion.
IEEE J. Solid State Circuits, 2000
1999
Non-ideal quantization noise shaping in switched-current bandpass Sigma-Delta modulators.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1997
Using CAD tools for shortening the design cycle of high-performance sigma-delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology.
Int. J. Circuit Theory Appl., 1997