Ramy E. Aly

According to our database, Ramy E. Aly authored at least 8 papers between 2003 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A Family of 32 nm IA Processors.

Nasser A. Kurd, Subramani Bhamidipati, Christopher Mozak, Jeffrey L. Miller, Praveen Mosalikanti, Timothy M. Wilson, Ali M. El-Husseini, Mark Neidengard, Ramy E. Aly, Mahadev Nemani, Muntaquim Chowdhury, Rajesh Kumar

IEEE J. Solid State Circuits, 2011

2007

Low-Power Cache Design Using 7T SRAM Cell.

Ramy E. Aly, Magdy A. Bayoumi

IEEE Trans. Circuits Syst. II Express Briefs, 2007

2006

High-Speed and Low-Power IP for Embedded Block Coding with Optimized Truncation (EBCOT) Sub-Block in JPEG2000 System Implementation.

Ramy E. Aly, Magdy A. Bayoumi

J. VLSI Signal Process., 2006

2005

Novel 7T sram cell for low power cache design.

Ramy E. Aly, Md. Ibrahim Faisal, Magdy A. Bayoumi

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Precharged SRAM cell for ultra low-power on-chip cache.

Ramy E. Aly, Magdy A. Bayoumi

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Dual sense amplified bit lines (DSABL) architecture for low-power SRAM design.

Ramy E. Aly, Mohamed A. Elgamel, Magdy A. Bayoumi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Novel high-throughput EBCOT architecture for JPEG2000.

Ramy E. Aly, Beth Wilson, Magdy A. Bayoumi

Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2003

Parallel high-speed architecture for EBCOT in JPEG2000.

Yijun Li, Ramy E. Aly, Magdy A. Bayoumi, Samia A. Mashali

Proceedings of the 2003 IEEE International Conference on Acoustics, 2003