Mohamed A. Elgamel

According to our database1, Mohamed A. Elgamel authored at least 31 papers between 2001 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2011
EVA-MAC: An event-based adaptive medium access control for wireless sensor networks.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

TALS: Trigonometry-based Ad-hoc Localization System for wireless sensor networks.
Proceedings of the 7th International Wireless Communications and Mobile Computing Conference, 2011

2010
PMCNOC: A Pipelining Multi-channel Central Caching Network-on-chip Communication Architecture Design.
J. Signal Process. Syst., 2010

Gaussian pulse approximation using standard CMOS and its application for sub-GHz UWB impulse radio.
Int. J. Circuit Theory Appl., 2010

An efficient area manipulation architecture for frequency domain encoding process.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Lightweight Collaborative Fault Tolerant Target Localization System for Wireless Sensor Networks.
IEEE Trans. Mob. Comput., 2009

Fast Variable Padding Motion Estimation Using Smart Zero Motion Prejudgment Technique for Pixel and Frequency Domains.
IEEE Trans. Circuits Syst. Video Technol., 2009

EB-MAC: An Event Based Medium Access Control for Wireless Sensor Networks.
Proceedings of the Seventh Annual IEEE International Conference on Pervasive Computing and Communications, 2009

Data Fusion Framework for Sand Detection in Pipelines.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2007
Adaptive Techniques for a Fast Frequency Domain Motion Estimation.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Fully Decentralized Weighted Kalman Filter for Wireless Sensor Networks with FuzzyART Neural Networks.
Proceedings of the 12th IEEE Symposium on Computers and Communications (ISCC 2007), 2007

2006
Design methodologies for high-performance noise-tolerant XOR-XNOR circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

2005
Efficient shield insertion for inductive noise reduction in nanometer technologies.
IEEE Trans. Very Large Scale Integr. Syst., 2005

Noise Metrics in Flip-Flop Designs.
IEICE Trans. Inf. Syst., 2005

A partial parallel algorithm and architecture for arithmetic encoder in JPEG2000.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Dual sense amplified bit lines (DSABL) architecture for low-power SRAM design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Low Power Full Search Block Matching Motion Estimation Vlsi Architectures.
J. Circuits Syst. Comput., 2004

A methodology for low power scheduling with resources operating at multiple voltages.
Integr., 2004

2003
Energy Efficient and Noise-Tolerant XOR-XNOR Circuit Design.
Proceedings of the International Conference on VLSI, 2003

Novel Design Methodology for High-Performance XOR-XNOR Circuit Design.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Minimum-Area Shield Insertion for Explicit Inductive Noise Reduction.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Crosstalk Noise Analysis in Ultra Deep Submicrometer Technologies.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Noise-constrained interconnect optimization for nanometer technologies.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

An efficient minimum area spacing algorithm for noise reduction.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Noise tolerant low voltage XOR-XNOR for fast arithmetic.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2002
Noise Tolerant Low Power Dynamic TSPCL D Flip-Flops.
Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002

On low power high level synthesis using genetic algorithms.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Low power full search block matching motion estimation architecture.
Proceedings of the Third International Workshop on Digital and Computational Video, 2002

Systolic array architectures for full-search block matching motion estimation.
Proceedings of the Third International Workshop on Digital and Computational Video, 2002

2001
Enhanced low power motion estimation VLSI architectures for video compression.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Hybrid Mesh-Based/Block-Based Motion Compensation Architecture.
Proceedings of the 2nd International Workshop on Digital and Computational Video (DCV 2001), 2001


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