Ravinder Rachala

According to our database, Ravinder Rachala authored at least 5 papers between 2014 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2017

Bristol Ridge: A 28-nm × 86 Performance-Enhanced Microprocessor Through System Power Management.

Sriram Sundaram, Aaron Grenat, Samuel Naffziger, Tom Burd, Stephen Kosonocky, Steven Liepe, Ravinder Rachala, Miguel Rodriguez, Michael Austin, Sriram Sambamurthy

IEEE J. Solid State Circuits, 2017

2016

4.2 Increasing the performance of a 28nm x86-64 microprocessor through system power management.

Aaron Grenat, Sriram Sundaram, Stephen Kosonocky, Ravinder Rachala, Sriram Sambamurthy, Steven Liepe, Miguel Rodriguez, Tom Burd, Adam Clark, Michael Austin, Samuel Naffziger

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Modeling and implementation of a fully-digital integrated per-core voltage regulation system in a 28nm high performance 64-bit processor.

Ravinder Rachala, Miguel Rodriguez, Stephen Kosonocky, Milos Trajkovic

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

2015

Steamroller Module and Adaptive Clocking System in 28 nm CMOS.

Kathryn Wilcox, Robert Cole, Harry R. Fair III, Kevin Gillespie, Aaron Grenat, Carson Henrion, Ravi Jotwani, Stephen Kosonocky, Benjamin Munger, Samuel Naffziger, Robert S. Orefice, Sanjay Pant, Donald A. Priore, Ravinder Rachala, Jonathan White

IEEE J. Solid State Circuits, 2015

2014

5.6 Adaptive clocking system for improved power efficiency in a 28nm x86-64 microprocessor.

Aaron Grenat, Sanjay Pant, Ravinder Rachala, Samuel Naffziger

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014