Sanjay Pant

Orcid: 0000-0002-2081-308X

According to our database1, Sanjay Pant authored at least 29 papers between 2003 and 2023.

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Bibliography

2023
On the Ca<sup>2+</sup> elevation in vascular endothelial cells due to inositol trisphosphate-sensitive store receptors activation: A data-driven modeling approach.
Comput. Biol. Medicine, September, 2023

2022
Strain energy density as a Gaussian process and its utilization in stochastic finite element analysis: application to planar soft tissues.
CoRR, 2022

2021
A proof of concept study for machine learning application to stenosis detection.
Medical Biol. Eng. Comput., 2021

Machine learning for detection of stenoses and aneurysms: application in a physiologically realistic virtual patient database.
CoRR, 2021

An Information-Theoretic Framework for Optimal Design: Analysis of Protocols for Estimating Soft Tissue Parameters in Biaxial Experiments.
Axioms, 2021

2020
Beyond Newton: A New Root-Finding Fixed-Point Iteration for Nonlinear Equations.
Algorithms, 2020

2018
A Lumped Parameter Model to Study Atrioventricular Valve Regurgitation in Stage 1 and Changes Across Stage 2 Surgery in Single Ventricle Patients.
IEEE Trans. Biomed. Eng., 2018

2015
Steamroller Module and Adaptive Clocking System in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015

A non-parametric k-nearest neighbour entropy estimator.
CoRR, 2015

2014
5.6 Adaptive clocking system for improved power efficiency in a 28nm x86-64 microprocessor.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
Automating Stressmark Generation for Testing Processor Voltage Fluctuations.
IEEE Micro, 2013

A Multiscale Filtering-Based Parameter Estimation Method for Patient-Specific Coarctation Simulations in Rest and Exercise.
Proceedings of the Statistical Atlases and Computational Models of the Heart. Imaging and Modelling Challenges, 2013

2012
AUDIT: Stress Testing the Automatic Way.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

2009
Energy-Efficient Subthreshold Processor Design.
IEEE Trans. Very Large Scale Integr. Syst., 2009

RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance.
IEEE J. Solid State Circuits, 2009

2008
A Charge-Injection-Based Active-Decoupling Technique for Inductive-Supply-Noise Suppression.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Circuit techniques for suppression and measurement of on-chip inductive supply noise.
Proceedings of the ESSCIRC 2008, 2008

2007
Power Grid Physics and Implications for CAD.
IEEE Des. Test Comput., 2007

Timing-Aware Decoupling Capacitance Allocation in Power Distribution Networks.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
A self-tuning DVS processor using delay-error detection and correction.
IEEE J. Solid State Circuits, 2006

An Active Decoupling Capacitance Circuit for Inductive Noise Suppression in Power Supply Networks.
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

Power grid physics and implications for CAD.
Proceedings of the 43rd Design Automation Conference, 2006

2005
Energy Optimization of Subthreshold-Voltage Sensor Network Processors.
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

Static timing analysis considering power supply variations.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2004
Analysis and Reduction of On-Chip Inductance Effects in Power Supply Grids.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

A stochastic approach To power grid analysis.
Proceedings of the 41th Design Automation Conference, 2004

2003
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

Vectorless Analysis of Supply Noise Induced Delay Variation.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003


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